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Optimization of wire array formation in p-type silicon for solar cell application
- Optimization of wire array formation in p-type silicon for solar cell application
- Jang, HS[Jang, Hwan Soo]; Oh, BY[Oh, Byeong-Yun]; Choi, HJ[Choi, Ho-Jin]; Baek, SH[Baek, Seong-Ho]; Kim, SB[Kim, Seong Been]; Kim, JH[Kim, Jae Hyun]
- DGIST Authors
- Jang, HS[Jang, Hwan Soo]; Choi, HJ[Choi, Ho-Jin]; Baek, SH[Baek, Seong-Ho]; Kim, SB[Kim, Seong Been]; Kim, JH[Kim, Jae Hyun]
- Issue Date
- Current Applied Physics, 11(1), S34-S38
- Article Type
- Article; Proceedings Paper
- Applied Current; Aspect Ratio; Counter Electrodes; Electrochemical Etching; Electrochemistry; Etch Pit; Etching Process; Etching Time; Optimization; Optimized Etching; P-Type; P-Type Silicon; Pore Wall; Porous Silicon; Semiconducting Silicon Compounds; Silicon-Based; Silicon Wafers; Silicon Wire Array; Silicon Wires; Solar-Cell Applications; Solar Cell; Solar Cells; Wire; Wire Arrays
- We present optimization of electrochemical etching process in p-type silicon because the formation of p-type ordered porous silicon or silicon wire arrays has not been well documented compared with n-type ones. In order to prepare and fabricate p-type silicon wire arrays without pore walls for silicon-based solar cell application, the effect of electrochemical etching process parameters, such as concentration of electrolyte, wafer resistivity, distance between counter electrode and silicon wafer, and applied current density and etching time, should be investigated. As a result, the morphology and aspect ratio (height/diameter) of silicon wires are observed and the behavior of electrochemical etching of silicon is studied. Finally, the vertically ordered silicon wire arrays are fabricated uniformly under the optimized etching conditions and the process is very reproducible. © 2010 Published by Elsevier B.V. All rights reserved.
- Elsevier B.V.
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