The Study of Vertical TFT System with Stress Release Structure for Flexible Electronics

Abstract

Development of flexible electronic technology is essential for various wearable / flexible electronic products. One of main technical issues is that flexible electronic devices are damaged or degraded easily by physical deformation, tensile or compressive stress induced by bending or folding states. An appropriate solution is to use materials with good ductility. However, it is not easy to solve the problem by using materials having excellent ductility for all the parts. Therefore, it is necessary to study the effect of structural parameters which result in the effect of stress-free or stress release. In this paper, the improvement of flexibility for two major electronic components, electrode and thin film transistor (TFT) have been conducted. First, we studied the concept of stress relief hole and stop hole, which were mainly used in the mechanical field, but in here, the size of hole was in micrometer range. Various hole array structures were employed in thin metal film and the effect of the structural change was analyzed with the simulation of stress intensity. By the result of the bending test, most of hole array structures were effective in improving fatigue resistance. For severe bending state, the hole array structure also had some crack propagation. However, since most of cracks were formed predictably in the same shape near the holes, it was possible to prevent a total electrical breakdown of metal electrode using triangular hole array ,whereas, the crack propagation was random for non-hole electrode design. Second, a vertical a-IGZO TFT design with mesh type bottom electrode was studied to minimize a breakdown of TFT. The vertical TFT has a structural difference from the conventional planar TFT. When cracks occur on the junction layer of TFT, current path is completely blocked if channel is formed in the horizon direction. On the other hands, current path of vertical channel design is not much affected by the cracks. In addition, the vertical TFT has an advantage that it can be used in various electronic products due to high on-current level because very narrow channel length can be easily controlled. However, the electrical field of gate is blocked easily due to its vertical design, which induces poor transistor behavior. Therefore, a new mesh structure not shielded by the gate electrode is applied to solve this problem, even though all layers are stacked vertically. Through simulation, we confirm that change of electrical potential in active layer by hole size and thickness of each layer. And even in the upper area of the metal, not in the hole area, it can be confirmed that the gate field has an influence near the hole. As result of experiment, we confirmed the operation of vertical TFT with mesh type electrode. In the micrometer dimension, it was confirmed that the hole size had no significant influence on the electrical characteristics, and it was confirmed that the hole percentage was slightly influenced. And then, we analyzed the reason why the characteristics were worse than desired. As a result, we concluded that if we use the metal mesh of the nanometer dimension, the area of the gate field to the upper part of the metal will be widened and electrical characteristics will be improved. Therefore, if our vertical TFT is fabricated in several hundred nanometer scale, it has advantage of simple method as well as better electrical characteristics. Since those two suggested structures, electrode with hole array and vertical TFT design, are simple and use similar fabrication process and materials of traditional electrical device, it can be applied easily to various flexible or foldable electronic devices. ⓒ 2017 DGIST