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    <title>Repository Community: null</title>
    <link>https://scholar.dgist.ac.kr/handle/20.500.11750/9965</link>
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        <rdf:li rdf:resource="https://scholar.dgist.ac.kr/handle/20.500.11750/59906" />
        <rdf:li rdf:resource="https://scholar.dgist.ac.kr/handle/20.500.11750/59146" />
        <rdf:li rdf:resource="https://scholar.dgist.ac.kr/handle/20.500.11750/58833" />
        <rdf:li rdf:resource="https://scholar.dgist.ac.kr/handle/20.500.11750/58770" />
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    <dc:date>2026-04-11T03:43:31Z</dc:date>
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  <item rdf:about="https://scholar.dgist.ac.kr/handle/20.500.11750/59906">
    <title>Cros-Rt: Cross-Layer Priority Scheduling for Predictable Inter-Process Communication in Ros 2</title>
    <link>https://scholar.dgist.ac.kr/handle/20.500.11750/59906</link>
    <description>Title: Cros-Rt: Cross-Layer Priority Scheduling for Predictable Inter-Process Communication in Ros 2
Author(s): Kim, Sohyun; Song, Juho; Lee, Kilho; Oh, Sangeun; Chwa, Hoon Sung
Abstract: The Robot Operating System 2 (ROS 2) is a popular middleware for distributed robotic applications. However, achieving real-time guarantees in ROS 2 is challenging due to unpredictable delays and priority inversions. We reveal that these issues arise from the lack of consistent priority propagation across ROS 2&amp;apos;s multi-layered communication architecture, particularly down to the kernel layer. To address this, we present CROS-RT, the first cross-layer scheduler explicitly designed to tackle the unpredictability in ROS 2 inter-process communication caused by multi-layer priority misalignment. CROS-RT ensures consistent, priority-based scheduling across the application, middleware, and kernel layers, introducing mechanisms for priority propagation, kernel-level message prioritization, and dynamic kernel thread adjustment. We have implemented and evaluated CROS-RT on the current stable release of ROS 2. Experiments demonstrate that CROS-RT enhances communication predictability, reducing the worst-case response time by up to 89.3 % over a baseline (vanilla ROS 2). Additionally, we provide an analytical model to derive upper bounds on response times, ensuring reliable realtime performance for safety-critical applications.</description>
    <dc:date>2025-05-07T15:00:00Z</dc:date>
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  <item rdf:about="https://scholar.dgist.ac.kr/handle/20.500.11750/59146">
    <title>Dynamic Load Balancing Framework for Compute-Network Resource Integration in MEC-Assisted Autonomous Vehicles</title>
    <link>https://scholar.dgist.ac.kr/handle/20.500.11750/59146</link>
    <description>Title: Dynamic Load Balancing Framework for Compute-Network Resource Integration in MEC-Assisted Autonomous Vehicles
Author(s): Kim, Jeonghwan; Song, Juho; Chwa, Hoonsung; Choi, Ji-Woong; Kwak, Jeongho
Abstract: As autonomous driving technology becomes more advanced, vehicle-edge computing (VEC) has drawn significant attention. However, it still faces challenges due to varying network conditions and the availability of roadside units (RSUs). In this paper, we present a Lyapunov optimization-based algorithm that jointly optimizes offloading decisions and computing resources, aiming to reduce energy consumption while keeping service time within acceptable limits through both vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) communication. We then evaluate the real-world performance of this algorithm by using simulator, which integrates a network model, an in-vehicle processing model in MATLAB, a vehicle topology model, and realistic driving scenarios generated with a virtual test drive (VTD).</description>
    <dc:date>2025-07-07T15:00:00Z</dc:date>
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  <item rdf:about="https://scholar.dgist.ac.kr/handle/20.500.11750/58833">
    <title>MEMORY MANAGEMENT SYSTEM AND METHOD USING MEMORY VIRTUALIZATION AND REAL-TIME SCHEDULING</title>
    <link>https://scholar.dgist.ac.kr/handle/20.500.11750/58833</link>
    <description>Title: MEMORY MANAGEMENT SYSTEM AND METHOD USING MEMORY VIRTUALIZATION AND REAL-TIME SCHEDULING
Author(s): 좌훈승; 강우성
Abstract: The present invention relates to a memory management system using memory virtualization and real-time scheduling. According to the present invention, the memory management system using memory virtualization and real-time scheduling comprises: a processor unit which manages a mapping table for converting a virtual memory address allocated to each of multiple DNN operations into a GPU virtual address in which data required for executing a corresponding DNN operation is stored, and accesses the GPU virtual address through a virtual memory address for the DNN operation on the basis of the mapping table and scheduling information to read the data, or swaps out the data from a GPU memory to a CPU memory or swaps in the data from the CPU memory to the GPU memory; and a scheduling unit for providing the scheduling information to the processor unit by scheduling an execution order and a swap-in/out operation for multiple DNN operations over time.</description>
  </item>
  <item rdf:about="https://scholar.dgist.ac.kr/handle/20.500.11750/58770">
    <title>다중 카메라 영상에 대한 효율적 객체 검출 및 추적을 수행하는 전자 장치 및 그 동작 방법</title>
    <link>https://scholar.dgist.ac.kr/handle/20.500.11750/58770</link>
    <description>Title: 다중 카메라 영상에 대한 효율적 객체 검출 및 추적을 수행하는 전자 장치 및 그 동작 방법
Author(s): 좌훈승; 백형부; 이진규; 강동화
Abstract: 다중 카메라 영상에 대한 효율적 객체 검출 및 추적을 수행하는 전자 장치 및 그 동작 방법이 개시된다. 본 발명은 다중 카메라 영상에 대한 효율적 객체 검출 및 추적을 가능하게 하는 스케줄링 기법을 제시함으로써, 한정된 자원의 시스템 환경에서도 보다 정확하고 빠른 객체 검출 및 추적이 가능하도록 지원할 수 있다.</description>
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