Cited 0 time in webofscience Cited 0 time in scopus

A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS

Title
A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS
Authors
Jeon, HyuntakBang, Jun-SukJung, YoontaeLee, TaejuJeon, YeseulKoh, Seok-TaeChoi, JaesukJang, DoojinHong, SoonyoungJe, Minkyu
Issue Date
2018-11-07
Citation
2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018, 91-92
Type
Conference
ISBN
9781538664124
Abstract
This paper presents a 5-bit VCO-based neural recording IC, which directly quantizes the input signal and achieves a large dynamic range (DR) to process the small-amplitude neural signal in the presence of the large-amplitude stimulation artifact (SA). A feedback-controlled source degeneration is applied to the input transconductor circuit (Gm,in) by using a resistor DAC (R-DAC). It mitigates the circuit nonlinearity, resulting in a large signal-to-noise-and-distortion ratio (SNDR) and a high input impedance (Zin). The implemented neural recording IC achieves 813dB SNDR over 200Hz signal bandwidth and 200mVPP maximum allowable input range while consuming 3.9μW per channel. © 2018 IEEE.
URI
http://hdl.handle.net/20.500.11750/9556
DOI
10.1109/ASSCC.2018.8579284
Publisher
Institute of Electrical and Electronics Engineers Inc.
Files:
There are no files associated with this item.
Collection:
ETC2. Conference Papers


qrcode mendeley

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE