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Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications

Title
Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications
Authors
Narayanamoorthy, SrinivasanMoghaddam, Hadi AsghariLiu, ZhenhongPark, TaejoonKim, Nam Sung
DGIST Authors
Park, Taejoon
Issue Date
2015-06
Citation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 23(6), 1180-1184
Type
Article
Article Type
Article
Keywords
Accuracy of ClassificationsApproximationComputational AccuracyComputational ErrorDigital DevicesDigital Signal Processing (DSP)Energy EfficiencyEnergy UtilizationErrorsFixed Point ArithmeticMatrix MultiplicationMultiplicationMultiplier ArchitectureSignal Processing
ISSN
1063-8210
Abstract
The need to support various digital signal processing (DSP) and classification applications on energy-constrained devices has steadily grown. Such applications often extensively perform matrix multiplications using fixed-point arithmetic while exhibiting tolerance for some computational errors. Hence, improving the energy efficiency of multiplications is critical. In this brief, we propose multiplier architectures that can tradeoff computational accuracy with energy consumption at design time. Compared with a precise multiplier, the proposed multiplier can consume 58% less energy/op with average computational error of ∼ 1 %. Finally, we demonstrate that such a small computational error does not notably impact the quality of DSP and the accuracy of classification applications. © 1993-2012 IEEE.
URI
http://hdl.handle.net/20.500.11750/2895
DOI
10.1109/TVLSI.2014.2333366
Publisher
Institute of Electrical and Electronics Engineers Inc.
Files:
There are no files associated with this item.
Collection:
Information and Communication EngineeringETC1. Journal Articles


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