Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jang, Hwan Soo | - |
dc.contributor.author | Choi, Ho-Jin | - |
dc.contributor.author | Lee, Hochun | - |
dc.contributor.author | Kim, Jae Hyun | - |
dc.date.available | 2017-07-11T06:59:10Z | - |
dc.date.created | 2017-04-10 | - |
dc.date.issued | 2012 | - |
dc.identifier.issn | 0013-4651 | - |
dc.identifier.uri | http://hdl.handle.net/20.500.11750/3410 | - |
dc.description.abstract | The formation of ordered various silicon structures was investigated by varying the parameters of electrochemical etching such as current density, concentration and temperature of electrolyte, back contact material, and pre-patterned size. The silicon wires with a high aspect ratio of more than 15 are formed uniformly over a large area from a wide range of current density below J ps and the etching rate of those are varied from 0.25 to 0.85 μm/min. We also found that there is limitation for fabricating the silicon wires as the etching depth increases. In addition, the three-dimensional multi-layer structures comprised of wires and macropores and the large and clear macropores having the diameter of more than 5 μm without additional process are produced. Furthermore, the embossed silicon wires are obtained by post-KOH etching. © 2011 The Electrochemical Society. | - |
dc.publisher | Electrochemical Society | - |
dc.title | Fabrication of Ordered Silicon Wire Structures via Macropores without Pore Wall by Electrochemical Etching | - |
dc.type | Article | - |
dc.identifier.doi | 10.1149/2.001202jes | - |
dc.identifier.wosid | 000298637500043 | - |
dc.identifier.scopusid | 2-s2.0-84855323203 | - |
dc.identifier.bibliographicCitation | Journal of the Electrochemical Society, v.159, no.2, pp.D37 - D45 | - |
dc.subject.keywordPlus | ARRAYS | - |
dc.subject.keywordPlus | Aspect Ratio | - |
dc.subject.keywordPlus | Back Contact | - |
dc.subject.keywordPlus | Electrochemical Etching | - |
dc.subject.keywordPlus | Electrolytes | - |
dc.subject.keywordPlus | Etching Depth | - |
dc.subject.keywordPlus | Etching Rate | - |
dc.subject.keywordPlus | High Aspect Ratio | - |
dc.subject.keywordPlus | Macropores | - |
dc.subject.keywordPlus | Morphology | - |
dc.subject.keywordPlus | Multilayer Structures | - |
dc.subject.keywordPlus | P-Type Silicon | - |
dc.subject.keywordPlus | Photonic Crystals | - |
dc.subject.keywordPlus | Pore Wall | - |
dc.subject.keywordPlus | Porous Silicon | - |
dc.subject.keywordPlus | SI | - |
dc.subject.keywordPlus | Silicon Structures | - |
dc.subject.keywordPlus | Silicon Wires | - |
dc.subject.keywordPlus | Wire | - |
dc.citation.endPage | D45 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | D37 | - |
dc.citation.title | Journal of the Electrochemical Society | - |
dc.citation.volume | 159 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Electrochemistry; Materials Science | - |
dc.relation.journalWebOfScienceCategory | Electrochemistry; Materials Science, Coatings & Films | - |
dc.type.docType | Article | - |
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