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Error recovery system encoder/decoder method and VHDL design for saving memory of embedded system
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- Title
- Error recovery system encoder/decoder method and VHDL design for saving memory of embedded system
- Issued Date
- 2012
- Citation
- Kim, B.-J. (2012). Error recovery system encoder/decoder method and VHDL design for saving memory of embedded system. 2nd International Conference on Mechanical and Aerospace Engineering, ICMAE 2011, 110–116, 4985–4991. doi: 10.4028/www.scientific.net/AMM.110-116.4985
- Type
- Conference Paper
- ISBN
- 9780000000000
- ISSN
- 1660-9336
- Abstract
-
Unexpected errors may occur in any embedded systems. An error correction circuitry is used to prevent system errors. Parity bits generated from an encoder are needed to perform an error recovery process. Therefore, to be stored in the memory space should be added. In this paper, Parity bits to be stored without a memory space that can be used to error correction circuitry are proposed. The proposed method was designed in VHDL. The proposed design used the Reed-Solomon (RS) code of an error correction method. Then, 8 bits of information symbols and a symbol error correcting RS code were designed based on the design. © (2012) Trans Tech Publications, Switzerland.
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- Publisher
- International Conference on Mechanical and Aerospace Engineering
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