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A Low-power CMOS Image Sensor Based on Variable Frame Rate Operation
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Title
A Low-power CMOS Image Sensor Based on Variable Frame Rate Operation
DGIST Authors
Choi, Byoung SooShin, EunsuBae, MyunghanKim, Sang-HwanLee, JiminOh, Chang-WooSeo, Sang-HoShin, Jang-Kyoo
Issued Date
2017-12
Citation
Choi, Byoung Soo. (2017-12). A Low-power CMOS Image Sensor Based on Variable Frame Rate Operation. doi: 10.5573/JSTS.2017.17.6.854
Type
Article
Article Type
Article
Author Keywords
CMOSimage sensorframe ratelow powerbias circuit
Keywords
ACTIVE PIXEL SENSORFEEDBACK STRUCTUREPHOTODETECTORPHOTODIODENOISEGATE
ISSN
1598-1657
Abstract

Various circuits and devices are integrated on the CMOS image sensor (CIS) chip. Sources of power consumption in the CIS include source followers of the pixel array, bias circuits, driving circuits, a noise canceller, and readout circuits. In this paper, a low-power complementary metal oxide semiconductor (CMOS) image sensor based on variable frame rate operation is proposed. Power consumption of bias circuits and source followers of the pixel array is reduced by the variable frame rate operation in the proposed CIS. In most cases, the constant bias current continuously flows through the bias circuits and source followers even if the frame rate is changed. However, results indicate that using the variable frame rate operation reduces the constant bias current of the proposed CIS. Results also indicate that the power consumption is reduced by lowering the frame rate without significant image degradation. © 2017, Institute of Electronics Engineers of Korea. All rights reserved.

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URI
http://hdl.handle.net/20.500.11750/5616
DOI
10.5573/JSTS.2017.17.6.854
Publisher
Institute of Electronics Engineers of Korea
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