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RoPIM: A Processing-in-Memory Architecture for Accelerating Rotary Positional Embedding in Transformer Models
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- Title
- RoPIM: A Processing-in-Memory Architecture for Accelerating Rotary Positional Embedding in Transformer Models
- Issued Date
- 2025-01
- Citation
- Jeon, Yunhyeong. (2025-01). RoPIM: A Processing-in-Memory Architecture for Accelerating Rotary Positional Embedding in Transformer Models. IEEE Computer Architecture Letters, 24(1), 41–44. doi: 10.1109/LCA.2025.3535470
- Type
- Article
- Author Keywords
- Processing-in-memory ; transformer model ; rotary positional embedding
- ISSN
- 1556-6056
- Abstract
-
The emergence of attention-based Transformer models, such as GPT, BERT, and LLaMA, has revolutionized Natural Language Processing (NLP) by significantly improving performance across a wide range of applications. A critical factor driving these improvements is the use of positional embeddings, which are crucial for capturing the contextual relationships between tokens in a sequence. However, current positional embedding methods face challenges, particularly in managing performance overhead for long sequences and effectively capturing relationships between adjacent tokens. In response, Rotary Positional Embedding (RoPE) has emerged as a method that effectively embeds positional information with high accuracy and without necessitating model retraining even with long sequences. Despite its effectiveness, RoPE introduces a considerable performance bottleneck during inference. We observe that RoPE accounts for 61% of GPU execution time due to extensive data movement and execution dependencies. In this paper, we introduce RoPIM, a Processing-In-Memory (PIM) architecture designed to efficiently accelerate RoPE operations in Transformer models. RoPIM achieves this by utilizing a bank-level accelerator that reduces off-chip data movement through in-accelerator support for multiply-addition operations and minimizes operational dependencies via parallel data rearrangement. Additionally, RoPIM proposes an optimized data mapping strategy that leverages both bank-level and row-level mappings to enable parallel execution, eliminate bank-to-bank communication, and reduce DRAM activations. Our experimental results show that RoPIM achieves up to a 307.9× performance improvement and 914.1× energy savings compared to conventional systems. © IEEE.
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- Publisher
- Institute of Electrical and Electronics Engineers
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