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전체 가 나 다 라 마 바 사 아 자 차 카 타 파 하

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Article
A 40-nm 118.44-TOPS/W Voltage-Sensing Compute-in-Memory RRAM Macro With Write Verification and Multi-Bit Encoding
  • Yoon, Jong-Hyeok ; 
  • Chang, Muya ; 
  • Khwa, Win-San ; 
  • Chih, Yu-Der ; 
  • Chang, Meng-Fan ; 
  • Raychowdhury, Arijit
  • 2022-03
  • Yoon, Jong-Hyeok. (2022-03). A 40-nm 118.44-TOPS/W Voltage-Sensing Compute-in-Memory RRAM Macro With Write Verification and Multi-Bit Encoding. IEEE Journal of Solid-State Circuits, 57(3), 845–857. doi: 10.1109/JSSC.2022.3141370
  • Institute of Electrical and Electronics Engineers
  • View : 320
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Article
A 40-nm, 64-Kb, 56.67 TOPS/W Voltage-Sensing Computing-In-Memory/Digital RRAM Macro Supporting Iterative Write With Verification and Online Read-Disturb Detection
  • Yoon, Jong-Hyeok ; 
  • Chang, Muya ; 
  • Khwa, Win-San ; 
  • Chih, Yu-Der ; 
  • Chang, Meng-Fan ; 
  • Raychowdhury, Arijit
  • 2022-01
  • Yoon, Jong-Hyeok. (2022-01). A 40-nm, 64-Kb, 56.67 TOPS/W Voltage-Sensing Computing-In-Memory/Digital RRAM Macro Supporting Iterative Write With Verification and Online Read-Disturb Detection. IEEE Journal of Solid-State Circuits, 57(1), 68–79. doi: 10.1109/jssc.2021.3101209
  • Institute of Electrical and Electronics Engineers
  • View : 504
  • Download : 0
Article
A Dual-Precision and Low-Power CNN Inference Engine Using a Heterogeneous Processing-in-Memory Architecture
  • Jung, Sangwoo ; 
  • Lee, Jaehyun ; 
  • Park, Dahoon ; 
  • Lee, Youngjoo ; 
  • Yoon, Jong-Hyeok ; 
  • Kung, Jaeha
  • 2024-12
  • Jung, Sangwoo. (2024-12). A Dual-Precision and Low-Power CNN Inference Engine Using a Heterogeneous Processing-in-Memory Architecture. IEEE Transactions on Circuits and Systems I: Regular Papers, 71(12), 5546–5559. doi: 10.1109/TCSI.2024.3395842
  • Institute of Electrical and Electronics Engineers
  • View : 191
  • Download : 0
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