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전체 가 나 다 라 마 바 사 아 자 차 카 타 파 하

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Article

A 2-Lane DAC-/ADC-Based 2 × 2 MIMO PAM-4 MMSE-DFE Wireline Transceiver With FEXT Cancellation on RFSoC Platform

Lee, Jaewon ;
Jang, Seoyoung ;
Choi, Yujin ;
Kim, Donggeon ;
Braendli, Matthias ;
Morf, Thomas ;
Kossel, Marcel ;
Francese, Pier-Andrea ;
Kim, Gain

2025-06
Lee, Jaewon. (2025-06). A 2-Lane DAC-/ADC-Based 2 × 2 MIMO PAM-4 MMSE-DFE Wireline Transceiver With FEXT Cancellation on RFSoC Platform. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 33(6), 1570–1581. doi: 10.1109/TVLSI.2025.3553400
Institute of Electrical and Electronics Engineers
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Article

A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification On RFSoC Platform

Lee, Jaewon ;
Jang, Seoyoung ;
Choi, Yujin ;
Kim, Donggeon ;
Yonar, Serdar ;
Braendli, Matthias ;
Ruffino, Andrea ;
Morf, Thomas ;
Kossel, Marcel ;
Francese, Pier-Andrea ;

2024-07
Lee, Jaewon. (2024-07). A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification On RFSoC Platform. IEEE Transactions on Circuits and Systems II: Express Briefs, 71(7), 3318–3322. doi: 10.1109/TCSII.2024.3362596
IEEE
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Article

A Loop-Break Decision Feedback Equalizer for DAC/ADC-DSP-Based Wireline Transceivers

Kim, Donggeon ;
Choi, Yujin ;
Lee, Jaewon ;
Jang, Seoyoung ;
Song, Sungyu ;
Braendli, Matthias ;
Morf, Thomas ;
Kossel, Marcel ;
Francese, Pier-Andrea ;
Kim, Gain

2024-11
Kim, Donggeon. (2024-11). A Loop-Break Decision Feedback Equalizer for DAC/ADC-DSP-Based Wireline Transceivers. IEEE Transactions on Circuits and Systems I: Regular Papers, 71(11), 5115–5128. doi: 10.1109/TCSI.2024.3435696
Institute of Electrical and Electronics Engineers
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