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A Low-Power Differential Current Reference with Process-Insensitive Temperature Compensation

Title
A Low-Power Differential Current Reference with Process-Insensitive Temperature Compensation
Authors
이동주
DGIST Authors
Lee, Dong Ju; Je, Minkyu; Lee, Junghyup
Advisor(s)
이정협
Co-Advisor(s)
Minkyu Je
Issue Date
2019
Available Date
2020-02-28
Degree Date
2019-02
Type
Thesis
Keywords
집적회로 설계
Abstract
Current reference is widely used in many circuit systeMaster to provide a stable dc value for other environmental changes. Environmental changes in the circuit system are process, supply voltage, and temperature variations. For example, when designing an oscillator or in a regulator, use a stable current to create a stable output. If the generated reference current which become the source of the analog circuit is not stable, the analog circuit using this current will be unstable and eventually the final output also becomes unstable. Therefore, this study aiMaster to produce stable dc currents which is robust to PVT variation without multi-point trimmin that costs more. This work proposed a low-power current reference made by the ratio of a compensation voltage and a resistance whose temperature coefficients (TC) are insensitive to process variations. And using some techniques, as a result, we can produce robust currents with PVT variations, obviating the need for expensive multi-point trimming. The proposed current reference is implemented in 0.18-μm CMOS technology and consumes 0.65-μW from a 1.1-V supply at a temperature coefficient of 31.84 ppm/˚C between -40˚C and 125˚C with a 1-point trimming. Over a supply range between 1.1 and 3.3 V, the line-sensitivity is 0.097 %/V.|이 논문의 CMOS 전류 기준원은 어떠한 환경적인 변화에도 안정적인 DC 값을 제공하기 위해 많은 회로 시스템에서 널리 사용된다. 회로 시스템의 환경 변화는 프로세스, 전원 전압 및 온도 변화이다. 예를 들어, 발진기를 설계하거나 레귤레이터를 설계할 때 안정적인 전류를 사용하여 안정적인 출력을 생성해야 한다. 아날로그 회로의 소스가 되는 생성된 기준 전류가 안정적이지 않으면, 이 전류를 사용하는 아날로그 회로는 불안정할 것이고 최종적으로는 우리가 원하는 출력도 불안정해질 것이다. 따라서 이 연구는 더 많은 비용을 들이는 multi-point trimming 없이 PVT 변화에 견고한 안정된 직류 전류를 생산하는 것을 목표로 한다. 이 연구는 보상 전압과 온도 계수 (TC)가 공정 변동에 둔감 한 저항의 비율로 이루어진 저전력 전류 기준을 제안했다. 결과적으로 일부 테크닉을 사용하여 PVT 변형을 사용하여 견고한 전류를 생성할 수 있으므로 값비싼 multi-point trimming이 필요하지 않는다. 제안된 전류 기준원은 0.18 μm CMOS 기술로 구현되었으며, -40 ˚C~125 ˚C 사이의 온도 계수 31.84 ppm/˚C에서 1.1 V 전원으로 0.65 μW를 소비하며 1-point trimming을 제공한다. 1.1~3.3 V 공급 범위에서 0.097 %/V 의 line sensitivity를 가진다.
Table Of Contents
Abstract………………………………………………………………………………i List of contents………………………………………………………………………ii List of tables…………………………………………………………………………v List of figures………………………………………………………………………vii І. Introduction........................................................................................................ 1 1.1 Motivation...................................................................................................... 1 1.2 Design Consideration (PVT Variations) ....................................................... 3 1.2.1 Process Variation................................................................................ 3 1.2.2 Voltage Variation................................................................................ 4 1.2.2.1 Line Sensitivity.................................................................... 4 1.2.3 Temperature Variation........................................................................ 4 1.2.3.1 Temperature Coefficient...................................................... 5 1.3 Conventional Current Reference................................................................... 6 1.3.1 Summing Currents.............................................................................. 6 1.3.2 Ratio-Metry........................................................................................ 7 Ⅱ. Design of Current Reference............................................................................ 9 2.1 Overall Architecture of the Proposed Current Reference.............................. 9 2.2 Compensation Voltage Generator............................................................... 11 2.2.1 Bipolar Junction Transistor............................................................ 11 2.2.2 Operating Principle........................................................................ 12 2.3 Current Driver............................................................................................ 15 2.3.1 Compensation Resistor................................................................... 15 2.3.2.1 Analysis of the Conventional Resistor............................ 16 2.3.2.2 Analysis of the Compensation Resistor.......................... 19 2.3.2 Current Source............................................................................... 22 2.4 Amplifier for Buffer.................................................................................... 24 2.4.1 Chopping Technique...................................................................... 24 Ⅲ. Simulation Results of Proposed Current Reference................................... 28 3.1 The Results of Compensation Voltage with Temperature........................... 28 3.2 The Results of Compensation Resistor with Temperature.......................... 31 3.3 The Result of Current Reference with Temperature................................... 34 3.4 The Results of Corner Variation of Current Reference............................... 35 3.5 The Result of Line Sensitivity of Current Reference.................................. 36 3.6 Layout of Current Reference....................................................................... 37 3.7 Microphotograph of Current Reference...................................................... 38 Ⅳ. Conclusions.................................................................................................... 39 References................................................................................................................ 42
URI
http://dgist.dcollection.net/common/orgView/200000171489
http://hdl.handle.net/20.500.11750/10738
DOI
10.22687/thesis.200000171489
Degree
MASTER
Department
Information and Communication Engineering
University
DGIST
Related Researcher
  • Author Lee, Junghyup Integrated Nano-Systems Laboratory
  • Research Interests Analog and Mixed Signal IC Design; Smart Sensor Systems; Bio-medical ICs and Body Channel Communication Systems
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Department of Information and Communication EngineeringThesesMaster


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