Full metadata record
DC Field | Value | Language |
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dc.contributor.author | Kim, Minsub | - |
dc.contributor.author | Kung, Jaeha | - |
dc.contributor.author | Lee, Sungjin | - |
dc.date.accessioned | 2019-12-16T01:11:42Z | - |
dc.date.available | 2019-12-16T01:11:42Z | - |
dc.date.created | 2019-10-28 | - |
dc.date.issued | 2020-01 | - |
dc.identifier.issn | 1556-6056 | - |
dc.identifier.uri | http://hdl.handle.net/20.500.11750/10992 | - |
dc.description.abstract | In this paper, we propose a novel storage architecture, called an Inference-Enabled SSD (IESSD), which employs FPGA-based DNN inference accelerators inside an SSD. IESSD is capable of performing DNN operations inside an SSD, avoiding frequent data movements between application servers and data storage. This boosts up analytics performance of DNN applications. Moreover, by placing accelerators near data within an SSD, IESSD delivers scalable analytics performance which improves with the amount of data to analyze. To evaluate its effectiveness, we implement an FPGA-based proof-of-concept prototype of IESSD and carry out a case study with an image tagging (classification) application. Our preliminary results show that IESSD exhibits 1.81x better performance, achieving 5.31x lower power consumption, over a conventional system with GPU accelerators. | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers | - |
dc.title | Towards Scalable Analytics with Inference-Enabled Solid-State Drives | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/LCA.2019.2930590 | - |
dc.identifier.scopusid | 2-s2.0-85083239671 | - |
dc.identifier.bibliographicCitation | IEEE Computer Architecture Letters, v.19, no.1, pp.13 - 17 | - |
dc.description.isOpenAccess | FALSE | - |
dc.subject.keywordAuthor | Image annotation | - |
dc.subject.keywordAuthor | Acceleration | - |
dc.subject.keywordAuthor | Hardware | - |
dc.subject.keywordAuthor | Servers | - |
dc.subject.keywordAuthor | Field programmable gate arrays | - |
dc.subject.keywordAuthor | Task analysis | - |
dc.subject.keywordAuthor | Computer architecture | - |
dc.subject.keywordAuthor | Solid-state drives | - |
dc.subject.keywordAuthor | in-storage processing | - |
dc.subject.keywordAuthor | deep neural networks | - |
dc.subject.keywordAuthor | convolutional neural networks | - |
dc.citation.endPage | 17 | - |
dc.citation.number | 1 | - |
dc.citation.startPage | 13 | - |
dc.citation.title | IEEE Computer Architecture Letters | - |
dc.citation.volume | 19 | - |
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