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Parasitic Current Induced by Gate Overlap in Thin-Film Transistors

Title
Parasitic Current Induced by Gate Overlap in Thin-Film Transistors
Authors
Lee, Hyeon-JunKatsumi AbeKim, June-SeoYun, Won SeokLee, Myoung-Jae
DGIST Authors
Lee, Hyeon-Jun; Katsumi Abe; Kim, June-Seo; Yun, Won Seok; Lee, Myoung-Jae
Issue Date
2021-05
Citation
Materials, 14(9), 2299
Type
Article
Author Keywords
oxide semiconductora-IGZObarrier loweringhump
Keywords
STRESSCIRCUITSIMPACT
ISSN
1996-1944
Abstract
As novel applications of oxide semiconductors are realized, various structural devices and integrated circuits are being proposed, and the gate-overlay defect phenomenon is becoming more diverse in its effects. Herein, the electrical properties of the transistor that depend on the geometry between the gate and the semiconductor layer are analyzed, and the specific phenomena associated with the degree of overlap are reproduced. In the semiconductor layer, where the gate electrode is not overlapped, it is experimentally shown that a dual current is generated, and the results of 3D simulations confirm that the magnitude of the current increases as the parasitic current moves away from the gate electrode. The generation and path of the parasitic current are then represented visually through laser-enhanced 2D transport measurements; consequently, the flow of the dual current in the transistor is verified to be induced by the electrical potential imbalance in the semiconductor active layer, where the gate electrodes do not overlap.
URI
http://hdl.handle.net/20.500.11750/15541
DOI
10.3390/ma14092299
Publisher
MDPI Open Access Publishing
Related Researcher
Files:
There are no files associated with this item.
Collection:
Division of Nanotechnology1. Journal Articles


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