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Ultra-low Power Receivers Based on Injection Locked Oscillators

Ultra-low Power Receivers Based on Injection Locked Oscillators
Alternative Title
주입 잠금 발진기를 이용한 저전력 수신기
Soonyoung Hong
DGIST Authors
Soonyoung HongJunghyup LeeMinkyu Je
Minkyu Je
Issued Date
Awarded Date
Ultra-low power, injection-locked oscillator, injection-locking receiver, multi-modulation, frequency-to-amplitude conversion, phase-to-amplitude conversion, wireless sensor node, internet of things, single-ended-to-differential conversion, Q enhancement, envelope detection, Demodulator, GFSK, low power, low-IF, CMOS
This thesis presents an ultra-low-power receiver based on the injection-locked oscillator (ILO), which is compatible with multiple modulation schemes such as on-off keying (OOK), binary frequency-shift keying (BFSK), and differential binary phase-shift keying (DBPSK). The receiver has been fabricat-ed in 0.18 µm CMOS technology and operates in the ISM band of 2.4 GHz. A simple envelope detection can be used even for the demodulation of BFSK and DBPSK signals due to the conversion capability of the ILO from the frequency and phase to the amplitude. In the proposed receiver, a Q-enhanced single-ended-to-differential amplifier is employed to provide high-gain amplification as well as narrow band-pass filtering, which improves the sensitivity and selectivity of the receiver. In addition, a gain-control loop is formed in the receiver to maintain constant lock range and hence frequency-to-amplitude con-version ratio for the varying power of the BFSK-modulated receiver input signal. The receiver achieves the sensitivity of –87, –85, and –82 dBm for the OOK, BFSK, and DBPSK signals respectively at the data rate of 50 kbps and the BER lower than 0.1 % while consuming the power of 324 µW in total
This thesis presents an ultra-low power, low cost demodulator for gaussian frequency shift keying (GFSK) receivers that use low intermediate frequencies (IF). The demodulator employs a direct IF to dig-ital data conversion scheme by using an injection-locked ring oscillator (ILRO) with a 1-bit flip-flop. It consumes 2.7 μW from a 1.0 V supply at a data rate of 500 kbps achieving an energy efficiency of 5.4 pJ/bit which is 30 times better than that of the recently presented works. The demodulator also achieves 17.5 dB SNR at 0.1 % BER while operating at the same date rate. The demodulator is implemented in a 0.18 μm standard CMOS process and occupies an active area of 0.012 mm2.
Table Of Contents
Ⅰ. Introduction 1
1.1 Motivation 1
1.2 Design Considerations of Receiver 4
1.3 Conventional Architecture 6
1.4 Proposed Structure 12
1.5 Overview of the thesis 15

Ⅱ. Injection Locked Oscillator 16
2.1 Operation Principle 17
2.1.1 Injection Locked LC Oscillator 17
2.1.2 Injection Locked Ring Oscillator 22
2.2 Conversion Process of Injection Locked Oscillator 27
2.2.1 Amplitude to Amplitude Conversion 27
2.2.2 Frequency to Amplitude Conversion 28
2.2.3 Phase to Amplitude Conversion 29
2.2.4 Frequency to Phase Conversion 31
2.3 Summary 39

Ⅲ. A Multi-Mode ULP Receiver Based on an Injection Locked LC Oscillator 40
3.1 Overall Receiver Architecture 40
3.2 Details of the Blocks 43
3.2.1 Pre-amplifier 43
3.2.2 Single to differential amplifier 48
3.2.3 Injection Locked LC oscillator 56
3.2.4 Fully Differential Envelope Detector 59
3.2.5 Base-band Amplifier 62
3.2.6 Fully Differential Comparator 64
3.2.7 Peak Detector 68
3.3 Experimental Results 72
3.4 Summary 82

Ⅳ. Ultra-low Power GFSK Demodulator Based on an Injec-tion Locked Ring Oscillator 83
4.1 Overall Demodulator Architecture 85
4.2 Details of the Blocks 87
4.1.1 Pulse Slicer 87
4.1.2 Injection Locked Ring Oscillator 88
4.3 Experimental Results 91
4.4 Summary 96

Ⅴ. Conclusions 97
References 100
Summary (in Korean) 104
Information and Communication Engineering
Related Researcher
  • 이정협 Lee, Junghyup 전기전자컴퓨터공학과
  • Research Interests Analog and Mixed Signal IC Design; Smart Sensor Systems; Bio-medical ICs and Body Channel Communication Systems
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Department of Electrical Engineering and Computer Science Theses Ph.D.


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