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dc.contributor.author Kim, Euihyeok ko
dc.contributor.author Kim, Min-Soo ko
dc.date.available 2017-07-05T08:44:07Z -
dc.date.created 2017-06-25 -
dc.date.issued 2013 -
dc.identifier.citation International Journal of Control and Automation, v.6, no.2, pp.121 - 134 -
dc.identifier.issn 2005-4297 -
dc.identifier.uri http://hdl.handle.net/20.500.11750/2279 -
dc.description.abstract A hash table is a fundamental data structure implementing an associative memory that maps a key to its associative value. Due to its very fast mapping operation of O(1), it has been widely used in various areas such as databases, bioinformatics, and distributed computing. Besides, the paradigm of micro-architecture design of CPUs is shifting away from faster uniprocessors toward slower chip multiprocessors. In order to fully exploit the performance of such modern computer architectures, the data structures and algorithms considering parallelism become more important than ever. This paper implements three cache-conscious hashing methods, linear hashing and chained hashing, and also, a modern hashing method, hopscotch hashing, and analyzes their performance under Intel 32-core CPU of Nehalem microarchitecture. We implement each hashing method using state-of-the-art techniques such as lock-free data structures, especially based on compare-and-swap (CAS) operations, and refinable data structures. To the best of our knowledge, the work done by this paper is the first work analyzing the performance of three all hashing methods under the same implementation framework. Experimental results using data of 223 (i.e., about eight millions) key-value pairs shows that lock-free linear hashing is the best for insert operation among three hashing methods, and lock-free chained hashing is the best for lookup operation. Hopscotch hashing shows the second best performance of lookup operation. However, hopscotch hash table size is much bigger than other hash table size. Through experiments, we have found that the hopscotch hashing is relatively not efficient than other hash methods. -
dc.publisher Security Engineering Research Support Center -
dc.subject Associative Processing -
dc.subject Bioinformatics -
dc.subject Cache Friendly -
dc.subject Chained Hashing -
dc.subject Compare-and-Swap -
dc.subject Compare-and-Swaps -
dc.subject Computer Architecture -
dc.subject Data Structures -
dc.subject Hash Table -
dc.subject Hopscotch Hashing -
dc.subject Intel Microarchitecture -
dc.subject Linear Hashing -
dc.subject Lock-Free Hash Tables -
dc.subject Micro Architectures -
dc.subject Microprocessor Chips -
dc.subject Multi-Cores -
dc.subject Multicores -
dc.subject Parallel Programming -
dc.subject Program Processors -
dc.subject Refinable Hash Tables -
dc.subject Systems Analysis -
dc.title Performance analysis of cache-conscious hashing techniques for multi-core CPUs -
dc.type Article -
dc.identifier.scopusid 2-s2.0-84878422394 -
dc.type.local Article(Overseas) -
dc.type.rims ART -
dc.description.journalClass 1 -
dc.identifier.citationVolume 6 -
dc.identifier.citationNumber 2 -
dc.identifier.citationStartPage 121 -
dc.identifier.citationEndPage 134 -
dc.identifier.citationTitle International Journal of Control and Automation -
dc.type.journalArticle Article -
dc.contributor.affiliatedAuthor Kim, Euihyeok -
dc.contributor.affiliatedAuthor Kim, Min-Soo -
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