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A Bandwidth and Resolution Reconfigurable Noise-Shaping SAR ADC for PIM applications
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- Title
- A Bandwidth and Resolution Reconfigurable Noise-Shaping SAR ADC for PIM applications
- Alternative Title
- PIM 응용분야를 위해 대역폭과 분해능이 가변 가능한 노이즈-쉐이핑 축차 비교형 아날로그 디지털 변환기
- DGIST Authors
- Dongwook Kim ; Junghyup Lee ; Jonghyeok Yoon
- Advisor
- 이정협
- Co-Advisor(s)
- Jonghyeok Yoon
- Issued Date
- 2024
- Awarded Date
- 2024-02-01
- Citation
- Dongwook Kim. (2024). A Bandwidth and Resolution Reconfigurable Noise-Shaping SAR ADC for PIM applications. doi: 10.22677/THESIS.200000723846
- Type
- Thesis
- Description
- Bandwidth;Resolution;Reconfigurable;ADC;Process-in-memory (PIM);대역폭;분해능;가변 가능한;ADC;프로세스-인-메모리(PIM)
- Table Of Contents
-
Ⅰ. INTRODUCTION 1
1.1 Background of PIM 1
1.2 Readout Circuit of PIM 4
1.3 Design Requirements of Readout Circuit 6
1.4 Design Methodology & Target Specification 7
1.5 Reconfigurability techniques of Prior Works 9
1.6 Background of SAR ADC 12
1.7 Background of Noise-Shaping SAR ADC 14
1.8 Thesis Overview 17
Ⅱ. A BANDWIDTH AND RESOLUTION RECONFIGURABLE NOISE-SHAPING SAR ADC 18
2.1 Conceptual Operation of Proposed Work 18
2.2 Overall Architecture 20
2.2.1 Overall Architecture of Proposed Work 20
2.2.2 Operation of Proposed Work 22
2.3. ADC Core System 25
2.3.1 Reconfigurable Noise-Shaping Integrator 25
2.3.2 Sample and Hold Circuit 31
2.3.3 Capacitive DAC 31
2.3.4 Dynamic Comparator 32
2.3.5 SAR Logic 33
2.4. Control Signal Block System 35
2.4.1 Overview of Control Signal Block System 35
2.4.2 Injection-Locked Oscillator 35
Ⅲ. POST-LAYOUT-SIMULATION RESULTS 37
3.1. Chip Layout 38
3.2. Power Breakdown 38
3.3. SAR ADC Performances 39
3.4. NS-SAR ADC Performances 40
3.5. Comparison Table 41
Ⅳ. CONCLUSION 42
V. APPENDIX 43
5.1. Power Estimation 43
5.2. Details of Power Breakdown 44
REFERENCES 45
- URI
-
http://hdl.handle.net/20.500.11750/48102
http://dgist.dcollection.net/common/orgView/200000723846
- Degree
- Master
- Publisher
- DGIST
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