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A Duty-Cycled CTDSM with Scalable Bandwidth and Power for ExG Biopotential Acquisition
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Title
A Duty-Cycled CTDSM with Scalable Bandwidth and Power for ExG Biopotential Acquisition
DGIST Authors
Wooyub ChunJunghyup LeeMinyoung Song
Advisor
이정협
Co-Advisor(s)
Minyoung Song
Issued Date
2025
Awarded Date
2025-02-01
Citation
Wooyub Chun. (2025). A Duty-Cycled CTDSM with Scalable Bandwidth and Power for ExG Biopotential Acquisition. doi: 10.22677/THESIS.200000846193
Type
Thesis
Description
ADC, DSM, Bio-Sensor, Analog Front Ends, ExG Biopotential, Bandwidth Power Scalable, Duty Cycling
Abstract
This paper introduces a continuous-time (CT) delta-sigma analog-to-digital converter (ADC) integrated with a capacitively-coupled chopper instrumentation amplifier (CCIA) for ExG biopotential recording system, offering duty-cycled operation with scalable bandwidth and power consumption. The system achieves scalable bandwidth by adjusting the integrator's load capacitance and the center frequency of the body-driven voltage- controlled oscillator (VCO). By making the bandwidth scalable, power consumption in the analog part can be reduced through the gain-bandwidth product and power trade-off, while in the digital part, dynamic power consumption can be minimized by changing the sampling frequency. Moreover, power efficiency is enhanced through duty-cycled operation, which minimizes unnecessary power dissipation during low-frequency signal recording in conventional systems. The proposed design satisfies the critical requirements for noise performance, power consumption, input range, and input impedance to support diverse bio-signal recordings. The proposed system, fabricated in the 0.18 μm standard CMOS process, achieves FoMSNDR,1 kHz = 170.3 dB for a 1 kHz bandwidth and FoMSNDR,10 kHz = 170.1 dB for a 10 kHz bandwidth. It consumes 2.8 μW of power for the 1 kHz bandwidth and 4.5 μW for the 10 kHz bandwidth, operating at a supply voltage of 0.6 V. The design occupies an active area of 0.138 mm².
Keywords : Continuous time delta sigma modulator, neural recording analog front ends, bandwidth and power scalable, duty-cycled operation|본 논문에서는 ExG 생체신호 기록 시스템을 위한 듀티 사이클링을 적용하고 대역폭 및 전력 소비가 조절 가능한 연속 시간 델타-시그마(CTΔΣ) 아날로그-
디지털 변환기(ADC)를 제안한다.
제안된 시스템은 Gm-C 적분기의 부하 커패시터 용량과 바디-드리븐 전압 제어 발진기(VCO)의 중심 주파수를 조절함으로써 대역폭을 10배 조절할 수 있으며, 듀티 사이클 운영 방식을 통해 기존 시스템에서 신호 기록 시 불필요한 전력 소모를 최소화한다. 또한, 저잡음 전류 재사용 증폭기 단계, 바디-드리븐 VCO 기반 양자화, 그리고 PIIB를 결합하여 높은 입력 임피던스, 넓은 입력 범위, 탁월한 잡음 성능을 달성하였다.
본 설계는 0.18 μm 표준 CMOS 공정을 사용하여 구현되었으며, 활성 면적은 0.138 mm²이다. 구체적으로, 시스템은 0.6 V 전원에서 동작하며, 1 kHz 대역폭에서는 2.8 μW, 10 kHz 대역폭에서는 4.5 μW의 전력을 소비하고, 각각 FoMSNDR은 170.3 dB 및 170.1 dB를 달성하였다. 이러한 결과는 제안된 시스템이 대역폭 및 전력 조절, 듀티 사이클 방식의 전력 소모의 최소화와 함께 ExG 기록 시스템의 엄격한 요구사항을 효과적으로 충족함을 입증하며, 다양한 생체신호 모니터링 응용에 실용적이고 효율적인 해결책을 제공함을 보여준다.
핵심어 : ADC 기반의 생체신호 기록 시스템, 대역폭/전력 가변 가능성
Table Of Contents
Ⅰ. Introduction 1
1.1 Motivation 1
1.2 Design Considerations 3
1.3 Background 5
Ⅱ. Proposed ExG Biopotential Recording System 10
2.1 Proposed System 10
2.1.1 Overall Architecture 10
2.1.2 Bandwidth and Power Scalability 15
2.1.3 Design of an Integrator 17
2.1.4 Duty-cycled operation 21
2.1.5 Design of a VCO Quantizer· 24
2.2 Proposed Chip Micrograph 27
III. Measurement Results 29
IV. Conclusion 36
V. Reference 37
URI
http://hdl.handle.net/20.500.11750/58056
http://dgist.dcollection.net/common/orgView/200000846193
DOI
10.22677/THESIS.200000846193
Degree
Master
Department
Department of Electrical Engineering and Computer Science
Publisher
DGIST
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