An Energy-Efficient Supply- and Temperature-Independent ΔΣ Capacitance-to-Digital Converter

Abstract

Capacitance-to-digital converters (CDCs) are widely used for measuring pressure, humidity and acceleration [1–3] in a myriad of biomedical and IoT applications, where energy-efficiency and robustness against supply and temperature variations are of paramount importance. For instance, a wirelessly powered device will need to maintain its sensing accuracy in the presence of a varying supply voltage festered with digital switching noise. On the other hand, stand-alone IoT devices may need to sense variables accurately in varying ambient temperatures and battery supply voltage levels. In both cases, energy efficiency is a key requirement to sustain long-term device operation from a battery. Given the stringent limitations on the form-factor, such systems often need to employ small-sized, low-sensitivity sensors, necessitating the CDC to have a high sensing resolution. Among the previously proposed CDCs, the SAR-CDC [1] achieves high-energy efficiency. However, its input bridge is directly dependent and hence sensitive to supply voltage variations and supply-noise. Secondly, the resolution is only ∼6fF, despite the high energy efficiency. Several recent works have adopted time-domain CDCs employing a VCO quantizer to achieve high-resolution at low power. A SAR-VCOΔΣ CDC [2] reported high energy efficiency along with ∼1fF resolution that needed calibration to maintain accuracy followed by a closed-loop two-step SAR-TDΔΣ CDC [3] avoided the need for calibration. Still, these architectures are susceptible to supply and temperature effects, especially when they vary over a wide range. To solve these issues, we propose a time-locked ΔΣ CDC (TLΔΣ CDC) w hose output is derived from a VCO w hose period is locked to a precise external clock TREF. Furthermore, the VCO is time-locked by regulating its local supply and ground, making it insensitive against any variations in the chip-level supply. Multi-bit counters are used for the generation of the output, with the aim to reduce the time-quantization error and reduce the overall power by lowering the sampling frequency. As a result, the proposed TLΔΣ CDC can achieve the state-of-the-art FOMS=2.54μJ∙ppm2, supply sensitivity of ±0.55%/V over 1.2-2.2V and temperature sensitivity of 49.1ppm/°C over -20°C and 125°C. The sensing resolution is 70.5aF. Implemented in a 0.18μm standard CMOS process, the TLΔΣ CDC consumes 42.76μW from a 1.2V supply and 0.2mm2 active area.