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Breaking the Performance-Stability Trade-off in Dual-Gate a-IGZO TFTs via Single-Step Laser Annealing for Capacitor-less DRAM

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dc.contributor.advisor 권혁준 -
dc.contributor.author Sihyeon Kwon -
dc.date.accessioned 2026-01-23T10:56:09Z -
dc.date.available 2026-01-23T10:56:09Z -
dc.date.issued 2026 -
dc.identifier.uri https://scholar.dgist.ac.kr/handle/20.500.11750/59699 -
dc.identifier.uri http://dgist.dcollection.net/common/orgView/200000943562 -
dc.description DRAM, Dual-gate TFT, laser annealing, IGZO, amorphous oxide semiconductors -
dc.description.tableofcontents List of Contents

Abstract i
List of contents iii
List of tables v
List of figures vi

Ⅰ. INTRODUCTION
1.1 DRAM Scaling and Structural Limitations 1
1.2 Amorphous Oxide Semiconductors (AOSs) 3
1.2.1 Defects: Oxygen Vacancies and Hydrogen Impurities 3
1.2.2 Carrier Transport Mechanisms 4
1.3 Characteristics of 2T0C DRAM Cells 6
1.3.1 Operating Principles of 2T0C DRAM 7
1.3.2 Operating Principles of Advanced 2T0C DRAM 10
1.4 Laser Annealing Process 11
1.4.1 Characteristics of Laser Annealing 12
II. EXPERIMENTAL DETAIL
2.1 Fabrication & Electrical Measurements 15
2.2 Laser System Set Up 17
III. RESULT AND DISCUSSION
3.1 Optimization of Dual-gate a-IGZO TFTs 19
3.1.1 Source/Drain materials optimization 20
3.1.2 Top-gate dielectric optimization 21
3.1.3 Effect of Top-Gate Overlap Regions 26
3.2 Laser Annealing Process on Dual-Gate a-IGZO TFTs 28
3.2.1 Film Composition and Chemical States Change 30
3.2.1.1 Channel region 30
3.2.1.2 Contact region 37
3.2.2 Simultaneous Enhancement of Drivability and Vth Stability 44
3.2.2.1 Positive Vth Shift and µFE Improvement 44
3.2.2.2 Contact Resistance Reduction 53
3.2.3 Electrical Stability of DG a-IGZO TFTs 58
3.2.3.1 Positive/Negative Bias Stress (PBS/NBS) Test 58
3.2.3.2 Underlying Mechanisms of Enhanced Stability 61
3.3 Read Operation Reliability for 2T0C DRAM Applications 64
IV. CONCLUSION
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dc.format.extent 74 -
dc.language eng -
dc.publisher DGIST -
dc.title Breaking the Performance-Stability Trade-off in Dual-Gate a-IGZO TFTs via Single-Step Laser Annealing for Capacitor-less DRAM -
dc.title.alternative 단일 레이저 열처리 공정을 통한 이중 게이트 비정질 인듐-갈륨-아연 산화물 박막 트랜지스터의 성능–안정성 트레이드오프 극복 및 커패시터리스 디램 응용 -
dc.type Thesis -
dc.identifier.doi 10.22677/THESIS.200000943562 -
dc.description.degree Master -
dc.contributor.department Department of Electrical Engineering and Computer Science -
dc.contributor.coadvisor Byeongmoon Lee -
dc.date.awarded 2026-02-01 -
dc.publisher.location Daegu -
dc.description.database dCollection -
dc.citation XT.IM 권58 202602 -
dc.date.accepted 2026-01-19 -
dc.contributor.alternativeDepartment 전기전자컴퓨터공학과 -
dc.subject.keyword DRAM, Dual-gate TFT, laser annealing, IGZO, amorphous oxide semiconductors -
dc.contributor.affiliatedAuthor Sihyeon Kwon -
dc.contributor.affiliatedAuthor Hyuk-Jun Kwon -
dc.contributor.affiliatedAuthor Byeongmoon Lee -
dc.contributor.alternativeName 권시현 -
dc.contributor.alternativeName Hyuk-Jun Kwon -
dc.contributor.alternativeName 이병문 -
dc.rights.embargoReleaseDate 2028-02-28 -
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