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The study of HZO-based transistor for neuromorphic computing
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 장재은 | - |
| dc.contributor.author | Donghyug Park | - |
| dc.date.accessioned | 2026-01-23T10:56:22Z | - |
| dc.date.available | 2026-01-23T10:56:22Z | - |
| dc.date.issued | 2026 | - |
| dc.identifier.uri | https://scholar.dgist.ac.kr/handle/20.500.11750/59705 | - |
| dc.identifier.uri | http://dgist.dcollection.net/common/orgView/200000946903 | - |
| dc.description | 강유전체,HZO,인터페이스 트랩,MFSM구조,메모리 윈도우 | - |
| dc.description.abstract | With the rapid advancement of artificial intelligence (AI), the amount of data processed by CPUs has increased dramatically. The traditional von Neumann architecture separates memory and processing units, which causes severe bottlenecks as data volume grows. In addition, massive data processing requires high energy efficiency, making low-power devices increasingly important. Therefore, analog synaptic devices that mimic biological synapses have attracted significant attention. Among them, HfO₂-based ferroelectric field- effect transistors (FEFETs) are promising due to their CMOS compatibility, ALD process suitability, and low- power operation. Ferroelectric switching behavior affects the electrical characteristics of FEFETs. In FEFETs, switching in the Metal-Ferroelectric-Semiconductor-Metal(MFSM) structure which combines a ferroelectric layer and a semiconductor is especially important. However, ferroelectric switching behavior depending on the channel material has still has not been extensively studied In this study, the properties of HZO thin films were optimized by varying process parameters and ALD conditions. Ferroelectric characteristics were evaluated in MFSM structures using different oxide semiconductor channels, Indium-Gallium-Zinc-Oxide(IGZO) and Zinc Oxide(ZnO). To evaluate as a transistor device, FEFETs were fabricated and analyzed. Ferroelectricity was first examined by varying the Hf/Zr composition ratio (1:1, 1.5:1, and 2:1) and film thickness (12, 15, and 18 nm) with TiN and W bottom electrodes. Metal-Insulator-Metal(MIM) capacitor measurements showed that the optimal condition was achieved for a 15 nm HZO film with a Hf/Zr ratio of 2:1 on a W bottom electrode, yielding a 2Pr value of 30 µC/cm². The optimized film also exhibited a negligible wake-up effect, which is favorable for memory operation. Subsequently, IGZO and ZnO were employed as oxide semiconductor layers to investigate ferroelectric behavior in MFSM structures through P–E and C–V measurements. The ferroelectric response in the MFSM structure strongly depended on the type of oxide semiconductor. XPS analysis revealed that the oxide semiconductor type and the oxygen content in the channel influence interface traps at the ferroelectric/oxide semiconductor interface during annealing. Based on these results, bottom-gate FEFETs were fabricated. The MFSM characteristics affect the memory window and subthreshold swing of the FEFETs. To enhance the memory window of IGZO based TFT, oxygen concentration of IGZO film was controlled by sputtering condition. Adjusting the oxygen concentration in IGZO improved both the memory window and subthreshold swing. Therefore, these results indicate that the performance of FEFETs can be improved not only by optimizing the properties of the HZO ferroelectric layer but also by engineering its interaction with the channel material. This finding provides an effective strategy for the development of high-performance synaptic devices. Keywords: Ferroelectric, HZO, Interface trap, MFSM structure, Memory window|인공지능(Artificial Intelligence, AI)의 발전으로 인해 현대 사회에서 처리해야 할 데이터의 양이 급격히 증가하였으며, 이에 따라 데이터 저장 장치와 처리 장치가 분리된 기존 폰 노이만 구조는 데이터 이동에 따른 병목 현계와 높은 전력 소모라는 한계를 드러내고 있다. 이러한 문제를 해결하기 위해 인간 두뇌의 시냅스를 모방한 아날로그 시냅틱 디바이스가 차세대 소자로 주목받고 있다. 하프니아 기반 강유전체인 HZO 박막을 이용한 강유전체 전계효과 트랜지스터는 CMOS 공정과의 호환성, ALD 공정의 적합성, 그리고 저전력 메모리 특성으로 인해 큰 관심을 받고 있다. 본 연구에서는 ALD 공정을 통해 HZO 박막을 제작하고, 하부 금속, Hf–Zr 조성비, 열처리 온도 등 공정 파라미터를 변화시켜 박막 특성을 최적화하였다. XRD, XPS, C–V 분석을 통해 공정 조건에 따라 HZO 박막의 강유전 특성이 크게 변화함을 확인하였으며, 최적 조건에서 2Pr = 30 μC/cm²의 우수한 특성을 확보하였다. 또한 채널 물질과 HZO 간의 상호작용을 분석하기 위해 MFSM 구조를 형성하였다. 그 결과, 채널 물질과 HZO 사이의 산소 이동이 강유전체 스위칭 특성 및 계면 결함에 중요한 영향을 미침을 확인하였다. 채널 물질에 포함된 산소는 증착 및 어닐링 과정에서 HZO로 확산되어 계면 결함을 감소시키며, 이로 인해 채널 물질에 따라 FeFET의 성능 차이가 발생함을 polarization, XPS, C–V 분석을 통해 검증하였다. 그 결과, ZnO를 도입한 MFSM 구조에서는 강유전체 스위칭 특성이 향상되었으며, 이를 통해 FeFET 소자 제작 시 성능 개선 가능성을 확인하였다.이를 바탕으로 ZnO 산화물 반도체를 채널로 적용한 FeFET을 제작한 결과, 약 2 V의 넓은 메모리 윈도우와 양호한 on/off ratio를 갖는 소자 특성을 확인하였다. 또한 IGZO의 산소 함유량을 조절하여 메모리 윈도우를 추가로 향상시켰다. 이러한 결과는 FeFET의 성능이 HZO 박막뿐만 아니라 채널 물질과의 상호작용을 통해 효과적으로 개선될 수 있음을 제시한다. 핵심어: 강유전체, HZO, 인터페이스 트랩, MFSM구조, 메모리윈도우 | - |
| dc.description.tableofcontents | Ⅰ. Introduction 1.1 Overview 1 1.2 Background 4 1.2.1 Ferroelectric HZO 4 1.2.2 Structure and operating principle of FEFET 5 1.2.3 Interface trap and oxygen vacancy in HZO 7 1.2.4 Previous work 8 Ⅱ. Experiment details 2.1 Device fabrication 10 2.2 Experimental setup 12 Ⅲ. HZO optimization in MIM and MFSM structure 3.1 HZO optimization in MIM structure 14 3.1.1 Stress engineering 14 3.1.2 Hf,Zr stoichiometry 20 3.1.3 Film thickness 21 3.1.4 Other characteristics of the optimized HZO thin film 23 3.2 Effect of channel material in MFSM structure 28 3.2.1 P-V,C-V characteristic of MFSM structure 29 3.2.2 XPS analysis 31 Ⅳ. Electrical characteristics of FEFETs 4.1 Electrical characteristic of IGZO FEFET and ZnO FEFET 36 4.2 Electrical characteristics of IGZO FEFETs with varying oxygen concentration 38 Ⅴ. Conclusion 42 |
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| dc.format.extent | 45 | - |
| dc.language | eng | - |
| dc.publisher | DGIST | - |
| dc.title | The study of HZO-based transistor for neuromorphic computing | - |
| dc.title.alternative | 뉴로모픽 컴퓨팅을 위한 HZO 기반 트렌지스터에 관한 연구 | - |
| dc.type | Thesis | - |
| dc.identifier.doi | 10.22677/THESIS.200000946903 | - |
| dc.description.degree | Master | - |
| dc.contributor.department | Department of Electrical Engineering and Computer Science | - |
| dc.contributor.coadvisor | Byeongmoon Lee | - |
| dc.date.awarded | 2026-02-01 | - |
| dc.publisher.location | Daegu | - |
| dc.description.database | dCollection | - |
| dc.citation | XT.IM 박25 202602 | - |
| dc.date.accepted | 2026-01-19 | - |
| dc.contributor.alternativeDepartment | 전기전자컴퓨터공학과 | - |
| dc.subject.keyword | 강유전체,HZO,인터페이스 트랩,MFSM구조,메모리 윈도우 | - |
| dc.contributor.affiliatedAuthor | Donghyug Park | - |
| dc.contributor.affiliatedAuthor | Jae Eun Jang | - |
| dc.contributor.affiliatedAuthor | Byeongmoon Lee | - |
| dc.contributor.alternativeName | 박동혁 | - |
| dc.contributor.alternativeName | Jae Eun Jang | - |
| dc.contributor.alternativeName | 이병문 | - |
| dc.rights.embargoReleaseDate | 2027-02-28 | - |
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