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- ;
- Lee, Jaewon ;
- Kossel, Marcel André ;
- Brändli, Matthias ;
- Morf, Thomas ;
- Francese, Pier Andrea ;
- Kim, Gain
- 2025-09-09
- 51st IEEE European Solid-State Electronics Research Conference, ESSERC 2025, pp.109 - 112
- IEEE Solid-State Circuits Society
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- Yonar, A. Serdar ;
- Francese, Pier Andrea ;
- Brandli, Matthias ;
- Kossel, Marcel ;
- Prathapan, Mridula ;
- Morf, Thomas ;
- Ruffino, Andrea ;
- Kim, Gain ;
- Jang, Taekwang
- 2023-07
- Yonar, A. Serdar. (2023-07). An 8b 1.0-to-1.25GS/s Time-Based ADC with Bipolar VTC and Sense Amplifier Latch Interpolated Gated Ring Oscillator TDC. IEEE Solid-State Circuits Letters, 6, 196–196. doi: 10.1109/LSSC.2023.3293273
- Institute of Electrical and Electronics Engineers Inc.
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