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전체 가 나 다 라 마 바 사 아 자 차 카 타 파 하

Showing results 1 to 5 of 5

Conference
Beyond Page Migration: Enhancing Tiered Memory Performance via Integrated Last-Level Cache Management and Page Migration
  • Lee, Hwanjun ; 
  • Kim, Minho ; 
  • Jung, Yeji ; 
  • Oh, Seonmu ; 
  • Kang, Ki-Dong ; 
  • Lee, Seunghak ; 
  • Kim, Daehoon
  • 2025-10-22
  • IEEE/ACM International Symposium on Microarchitecture, pp.1763 - 1776
  • IEEE Computer Society
  • View : 115
  • Download : 0

CABANA: Cluster-Aware Query Batching for Accelerating Billion-Scale ANNS with Intel® AMX

Article
CABANA: Cluster-Aware Query Batching for Accelerating Billion-Scale ANNS with Intel® AMX
  • Kim, Minho ; 
  • Ji, Houxiang ; 
  • Kang, Jaeyoung ; 
  • Lee, Hwanjun ; 
  • Kim, Daehoon ; 
  • Kim, Nam Sung
  • 2025-07
  • IEEE Computer Architecture Letters, v.24, no.2, pp.289 - 292
  • Institute of Electrical and Electronics Engineers Inc.
  • View : 61
  • Download : 71
Conference
GreenDIMM: OS-Assisted DRAM Power Management for DRAM with a Sub-Array Granularity Power-Down State
  • Lee, Seunghak ; 
  • Kang, Ki Dong ; 
  • Lee, Hwanjun ; 
  • Park, Hyungwon ; 
  • Son, Younghoon ; 
  • Kim, Namsun ; 
  • Kim, Daehoon
  • 2021-10-20
  • Lee, Seunghak. (2021-10-20). GreenDIMM: OS-Assisted DRAM Power Management for DRAM with a Sub-Array Granularity Power-Down State. 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 131–142. doi: 10.1145/3466752.3480089
  • IEEE Computer Society
  • View : 276
  • Download : 0
Article
RoPIM: A Processing-in-Memory Architecture for Accelerating Rotary Positional Embedding in Transformer Models
  • Jeon, Yunhyeong ; 
  • Jang, Minwoo ; 
  • Lee, Hwanjun ; 
  • Jung, Yeji ; 
  • Jung, Jin ; 
  • Lee, Jonggeon ; 
  • So, Jinin ; 
  • Kim, Daehoon
  • 2025-01
  • Jeon, Yunhyeong. (2025-01). RoPIM: A Processing-in-Memory Architecture for Accelerating Rotary Positional Embedding in Transformer Models. IEEE Computer Architecture Letters, 24(1), 41–44. doi: 10.1109/LCA.2025.3535470
  • Institute of Electrical and Electronics Engineers
  • View : 219
  • Download : 0
Article
T-CAT: Dynamic Cache Allocation for Tiered Memory Systems with Memory Interleaving
  • Lee, Hwanjun ; 
  • Lee, Seunghak ; 
  • Jung, Yeji ; 
  • Kim, Daehoon
  • 2023-07
  • Lee, Hwanjun. (2023-07). T-CAT: Dynamic Cache Allocation for Tiered Memory Systems with Memory Interleaving. IEEE Computer Architecture Letters, 22(2), 73–76. doi: 10.1109/LCA.2023.3290197
  • Institute of Electrical and Electronics Engineers
  • View : 574
  • Download : 0
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