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전체 가 나 다 라 마 바 사 아 자 차 카 타 파 하

Showing results 1 to 8 of 8

Article
A 2-Lane Discrete Multitone Wireline Receiver Datapath With Far-End Crosstalk Cancellation on RFSoC Platform
  • Lee, Jaewon ; 
  • Jang, Seoyoung ; 
  • Braendli, Matthias ; 
  • Morf, Thomas ; 
  • Kossel, Marcel ; 
  • Francese, Pier-Andrea ; 
  • Kim, Gain
  • 2024-11
  • Lee, Jaewon. (2024-11). A 2-Lane Discrete Multitone Wireline Receiver Datapath With Far-End Crosstalk Cancellation on RFSoC Platform. IEEE Transactions on Circuits and Systems II: Express Briefs, 71(11), 4738–4742. doi: 10.1109/TCSII.2024.3410688
  • Institute of Electrical and Electronics Engineers
  • View : 123
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Article
A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification On RFSoC Platform
  • Lee, Jaewon ; 
  • Jang, Seoyoung ; 
  • Choi, Yujin ; 
  • Kim, Donggeon ; 
  • Yonar, Serdar ; 
  • Braendli, Matthias ; 
  • Ruffino, Andrea ; 
  • Morf, Thomas ; 
  • Kossel, Marcel ; 
  • Francese, Pier-Andrea ; 
    • et al
  • 2024-07
  • Lee, Jaewon. (2024-07). A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification On RFSoC Platform. IEEE Transactions on Circuits and Systems II: Express Briefs, 71(7), 3318–3322. doi: 10.1109/TCSII.2024.3362596
  • IEEE
  • View : 199
  • Download : 0
Article
Design and Implementation of a Hybrid UWB Pulse Generator for Automotive Radar
  • 2014
  • Kim, Sang-Dong. (2014). Design and Implementation of a Hybrid UWB Pulse Generator for Automotive Radar. doi: 10.5755/j01.eee.20.3.2774
  • Kaunas University of Technology
  • View : 589
  • Download : 0
Article
Development of HW/SW Platform for Real-Time Tests of Radar Front-End Module for Radar Machine Learning
  • 2022-10
  • Jin, Youngseok. (2022-10). Development of HW/SW Platform for Real-Time Tests of Radar Front-End Module for Radar Machine Learning. Journal of Industrial Information Technology and Application, 6(3), 600–609. doi: 10.22664/ISITA.2021.6.3.600
  • Journal of Industrial Information Technology and Application
  • View : 317
  • Download : 0
Thesis
Dynamic Precision Control of a DNN Training Accelerator Using RISC-V Processor
  • Jeik Choi
  • 2023
  • Jeik Choi. (2023). Dynamic Precision Control of a DNN Training Accelerator Using RISC-V Processor. doi: 10.22677/THESIS.200000655606
  • DGIST
  • View : 437
  • Download : 0

Implementation of an FPGA-Based 3D Shape Measurement System Using High-Level Synthesis

Article
Implementation of an FPGA-Based 3D Shape Measurement System Using High-Level Synthesis
  • 2024-08
  • Kim, Tae-Hyeon. (2024-08). Implementation of an FPGA-Based 3D Shape Measurement System Using High-Level Synthesis. Electronics, 13(16), 1–14. doi: 10.3390/electronics13163282
  • MDPI
  • View : 365
  • Download : 80
Article
Predicting System Failure Rates of SRAM-based FPGA On-Board Processors in Space Radiation Environments
  • Jung, Seunghwa ; 
  • Choi, Jihwan P.
  • 2019-03
  • Jung, Seunghwa. (2019-03). Predicting System Failure Rates of SRAM-based FPGA On-Board Processors in Space Radiation Environments. Reliability Engineering and System Safety, 183, 374–386. doi: 10.1016/j.ress.2018.09.015
  • Elsevier BV
  • View : 808
  • Download : 0
Article
스테레오 비전의 정합을 통한 실시간 깊이 맵 추출 하드웨어 구조 및 설계
  • 권순 ; 
  • 김준섭 ; 
  • 김영형 ; 
  • 이용환
  • 2014-02
  • 권순. (2014-02). 스테레오 비전의 정합을 통한 실시간 깊이 맵 추출 하드웨어 구조 및 설계. doi: 10.14801/kiitr.2014.12.2.163
  • 한국정보기술학회
  • View : 1169
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