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Showing results 1 to 4 of 4

  • Lee, Jaewon
  • Jang, Seoyoung
  • Choi, Yujin
  • Kim, Donggeon
  • Braendli, Matthias
  • Morf, Thomas
  • Kossel, Marcel
  • Francese, Pier-Andrea
  • Kim, Gain
  • 2025-06
  • Lee, Jaewon. (2025-06). A 2-Lane DAC-/ADC-Based 2 × 2 MIMO PAM-4 MMSE-DFE Wireline Transceiver With FEXT Cancellation on RFSoC Platform. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 33(6), 1570–1581. doi: 10.1109/TVLSI.2025.3553400
  • Institute of Electrical and Electronics Engineers
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  • Lee, Jaewon
  • Jang, Seoyoung
  • Braendli, Matthias
  • Morf, Thomas
  • Kossel, Marcel
  • Francese, Pier-Andrea
  • Kim, Gain
  • 2024-11
  • Lee, Jaewon. (2024-11). A 2-Lane Discrete Multitone Wireline Receiver Datapath With Far-End Crosstalk Cancellation on RFSoC Platform. IEEE Transactions on Circuits and Systems II: Express Briefs, 71(11), 4738–4742. doi: 10.1109/TCSII.2024.3410688
  • Institute of Electrical and Electronics Engineers
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  • Lee, Jaewon
  • Jang, Seoyoung
  • Choi, Yujin
  • Kim, Donggeon
  • Yonar, Serdar
  • Braendli, Matthias
  • Ruffino, Andrea
  • Morf, Thomas
  • Kossel, Marcel
  • Francese, Pier-Andrea
  • et al
  • 2024-07
  • Lee, Jaewon. (2024-07). A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification On RFSoC Platform. IEEE Transactions on Circuits and Systems II: Express Briefs, 71(7), 3318–3322. doi: 10.1109/TCSII.2024.3362596
  • IEEE
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  • Lee, Jaewon
  • Jang, Seoyoung
  • Kim, Donggeon
  • Choi, Yujin
  • Yoon, Jong-Hyeok
  • Braendli, Matthias
  • Morf, Thomas
  • Kossel, Marcel
  • Francese, Pier-Andrea
  • Kim, Gain
  • 2024-12
  • Lee, Jaewon. (2024-12). A Discrete Multitone Wireline Transceiver Datapath With On-Chip Sign-Sign LMS Adaptation And Loading Profile Optimization On RFSoC. IEEE Transactions on Circuits and Systems II: Express Briefs, 71(12), 4889–4893. doi: 10.1109/TCSII.2024.3450695
  • Institute of Electrical and Electronics Engineers Inc.
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