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Article
A 112-Gb/s Discrete Multitone Wireline Receiver Datapath With Time-Interleaved Time-Based ADC in 5-nm FinFET
  • Lee, Jaewon ; 
  • Francese, Pier-Andrea ; 
  • Braendli, Matthias ; 
  • Morf, Thomas ; 
  • Kossel, Marcel ; 
  • Jang, Seoyoung ; 
  • Choi, Yujin ; 
  • Kim, Donggeon ; 
  • Jang, Taekwang ; 
  • Kim, Gain
  • 2026-01
  • IEEE Journal of Solid-State Circuits, v.61, no.1, pp.8 - 19
  • Institute of Electrical and Electronics Engineers
  • View : 260
  • Download : 0
Article
A 2-Lane DAC-/ADC-Based 2 × 2 MIMO PAM-4 MMSE-DFE Wireline Transceiver With FEXT Cancellation on RFSoC Platform
  • Lee, Jaewon ; 
  • Jang, Seoyoung ; 
  • Choi, Yujin ; 
  • Kim, Donggeon ; 
  • Braendli, Matthias ; 
  • Morf, Thomas ; 
  • Kossel, Marcel ; 
  • Francese, Pier-Andrea ; 
  • Kim, Gain
  • 2025-06
  • Lee, Jaewon. (2025-06). A 2-Lane DAC-/ADC-Based 2 × 2 MIMO PAM-4 MMSE-DFE Wireline Transceiver With FEXT Cancellation on RFSoC Platform. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 33(6), 1570–1581. doi: 10.1109/TVLSI.2025.3553400
  • Institute of Electrical and Electronics Engineers
  • View : 566
  • Download : 0
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