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Vertical Thin Film Transistor employing micro-hole array structure in a metal electrode
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Title
Vertical Thin Film Transistor employing micro-hole array structure in a metal electrode
DGIST Authors
Gyeonghyeon ChoiJae Eun JangHongki Kang
Advisor
장재은
Co-Advisor(s)
Hongki Kang
Issued Date
2022
Awarded Date
2022/02
Citation
Gyeonghyeon Choi. (2022). Vertical Thin Film Transistor employing micro-hole array structure in a metal electrode. doi: 10.22677/thesis.200000595445
Type
Thesis
Subject
Vertical TFT, Micro-hole array, IGZO TFT, Schottky diode, PN-heterojunction
Description
Vertical TFT, Micro-hole array, IGZO TFT, Schottky diode, PN-heterojunction
Table Of Contents
Ⅰ. INTRODUCTION 1
1.1 Background of TFT 1
1.1.1 Structure and operation principle 1
1.1.2 Various channel materials 3
1.2 Vertical TFT 6
1.2.1 Background of vertical TFT 6
Ⅱ. EXPERIMENTAL 16
2.1 Fabrication of metal micro-hole array vertical TFT 16
2.1.1 Metal micro-hole array with oxide passivation layer 20
2.1.2 Metal micro-hole array with PN passivation layer 23
Ⅲ. ELECTRICAL CHARACTERISTICS OF METAL MICRO-HOLE ARRAY VERTICAL TFT 26
3.1 Source metal with Ohmic or Schottky contact 26
3.2 Drain metal with Ohmic or Schottky contact 39
3.3 Characteristic change according to size or thickness 45
Ⅳ. ELECTRICAL CHARACTERISTICS DEPENDING ON VERTICAL TFT STRUCTURE 51
4.1 Metal micro-hole array with oxide passivation layer 51
4.2 Metal micro-hole array with PN passivation layer 56
Ⅴ. CONCLUSION 63
URI
http://dgist.dcollection.net/common/orgView/200000595445
http://hdl.handle.net/20.500.11750/16346
DOI
10.22677/thesis.200000595445
Degree
Master
Department
Information and Communication Engineering
Publisher
DGIST
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