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dc.contributor.author Kang, Ki Dong -
dc.contributor.author Park, Gyeongseo -
dc.contributor.author Kim, Hyosang -
dc.contributor.author Alian, Mohammad -
dc.contributor.author Kim, Nam Sung -
dc.contributor.author Kim, Daehoon -
dc.date.accessioned 2023-12-26T18:43:12Z -
dc.date.available 2023-12-26T18:43:12Z -
dc.date.created 2021-11-18 -
dc.date.issued 2021-10-20 -
dc.identifier.isbn 9781450385572 -
dc.identifier.issn 1072-4451 -
dc.identifier.uri http://hdl.handle.net/20.500.11750/46892 -
dc.description.abstract Processor power management exploiting Dynamic Voltage and Frequency Scaling (DVFS) plays a crucial role in improving the data-center's energy efficiency. However, we observe that current power management policies in Linux (i.e., governors) often considerably increase tail response time (i.e., violate a given Service Level Objective (SLO)) and energy consumption of latency-critical applications. Furthermore, the previously proposed SLO-aware power management policies oversimplify network request processing and ignore the fact that network requests arrive at the application layer in bursts. Considering the complex interplay between the OS and network devices, we propose a power management framework exploiting network packet processing mode transitions in the OS to quickly react to the processing demands from the received network requests. Our proposed power management framework tracks the transitions between polling and interrupt in the network software stack to detect excessive packet processing on the cores and immediately react to the load changes by updating the voltage and frequency (V/F) states. Our experimental results show that our framework does not violate SLO and reduces energy consumption by up to 35.7% and 14.8% compared to Linux governors and stateof- the-art SLO-aware power management techniques, respectively. © 2021 Association for Computing Machinery. -
dc.language English -
dc.publisher IEEE Computer Society -
dc.relation.ispartof PROCEEDINGS OF 54TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, MICRO 2021 -
dc.title NMAP: Power Management Based on Network Packet Processing Mode Transition for Latency-Critical Workloads -
dc.type Conference Paper -
dc.identifier.doi 10.1145/3466752.3480098 -
dc.identifier.wosid 001118047400011 -
dc.identifier.scopusid 2-s2.0-85118898008 -
dc.identifier.bibliographicCitation 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), pp.143 - 154 -
dc.identifier.url https://www.microarch.org/micro54/ -
dc.citation.conferenceDate 2021-10-18 -
dc.citation.conferencePlace GR -
dc.citation.conferencePlace Athens -
dc.citation.endPage 154 -
dc.citation.startPage 143 -
dc.citation.title 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) -
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Department of Electrical Engineering and Computer Science Computer Architecture and Systems Lab 2. Conference Papers

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