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Algorithm-Hardware Co-Design for Efficient Brain-Inspired Hyperdimensional Learning on Edge (Extended Abstract)

Title
Algorithm-Hardware Co-Design for Efficient Brain-Inspired Hyperdimensional Learning on Edge (Extended Abstract)
Author(s)
Ni, YangKim, YeseongRosing, TajanaImani, Mohsen
Issued Date
2023-08-24
Citation
International Joint Conference on Artificial Intelligence, pp.6474 - 6479
Type
Conference Paper
ISBN
9781956792034
ISSN
1045-0823
Abstract
In this paper, we propose an efficient framework to accelerate a lightweight brain-inspired learning solution, hyperdimensional computing (HDC), on existing edge systems. Through algorithm-hardware co-design, we optimize the HDC models to run them on the low-power host CPU and machine learning accelerators like Edge TPU. By treating the lightweight HDC learning model as a hyper-wide neural network, we exploit the capabilities of the accelerator and machine learning platform, while reducing training runtime costs by using bootstrap aggregating. Our experimental results conducted on mobile CPU and the Edge TPU demonstrate that our framework achieves 4.5 times faster training and 4.2 times faster inference than the baseline platform. Furthermore, compared to the embedded ARM CPU, Raspberry Pi, with similar power consumption, our framework achieves 19.4 times faster training and 8.9 times faster inference. © 2023 International Joint Conferences on Artificial Intelligence. All rights reserved.
URI
http://hdl.handle.net/20.500.11750/47908
DOI
10.24963/ijcai.2023/723
Publisher
International Joint Conferences on Artifical Intelligence (IJCAI)
Related Researcher
  • 김예성 Kim, Yeseong
  • Research Interests Embedded Systems for Edge Intelligence; Brain-Inspired HD Computing for AI; In-Memory Computing
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Appears in Collections:
Department of Electrical Engineering and Computer Science Computation Efficient Learning Lab. 2. Conference Papers

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