WEB OF SCIENCE
SCOPUS
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Jaewon | - |
| dc.contributor.author | Jang, Seoyoung | - |
| dc.contributor.author | Braendli, Matthias | - |
| dc.contributor.author | Morf, Thomas | - |
| dc.contributor.author | Kossel, Marcel | - |
| dc.contributor.author | Francese, Pier-Andrea | - |
| dc.contributor.author | Kim, Gain | - |
| dc.date.accessioned | 2024-11-06T14:40:13Z | - |
| dc.date.available | 2024-11-06T14:40:13Z | - |
| dc.date.created | 2024-06-24 | - |
| dc.date.issued | 2024-11 | - |
| dc.identifier.issn | 1549-7747 | - |
| dc.identifier.uri | http://hdl.handle.net/20.500.11750/57137 | - |
| dc.description.abstract | This brief presents a 2-lane discrete multitone (DMT) wireline receiver (RX) with a far-end crosstalk (FEXT) cancellation and its implementation on the ZCU111 RFSoC evaluation board for real-time functional verification. The RX datapath is implemented with the 64-parallel 128-tap multi-path delay-feedback (MDF) fast Fourier transform (FFT) to optimize resources and throughput. The multiple-input, multiple-output (MIMO) frequency-domain equalizer (FDE) compensates both channel insertion loss (IL) and FEXT based on coefficients computed from an on-chip pilot-assist channel estimation (CHEST). The platform includes a programmable logic (PL) for a DMT digital signal processor (DSP) running at 32 MHz, 2.048 GS/s data converters, and intersymbol interference (ISI)/FEXT board. This system enables the reflection of a realistic hardware impairment and real-time transceiver (TRX) operation with a quick bit error rate (BER) test. The measurement demonstrates that the MIMO DMT significantly improves a BER from 1.0E-2 to 5.8E-7 when the FEXT is canceled for a channel exhibiting 15 dB of IL and 10 dB of IL-to-crosstalk ratio (ICR) at Nyquist frequency. IEEE | - |
| dc.language | English | - |
| dc.publisher | Institute of Electrical and Electronics Engineers | - |
| dc.title | A 2-Lane Discrete Multitone Wireline Receiver Datapath With Far-End Crosstalk Cancellation on RFSoC Platform | - |
| dc.type | Article | - |
| dc.identifier.doi | 10.1109/TCSII.2024.3410688 | - |
| dc.identifier.wosid | 001348293900023 | - |
| dc.identifier.scopusid | 2-s2.0-85195366818 | - |
| dc.identifier.bibliographicCitation | Lee, Jaewon. (2024-11). A 2-Lane Discrete Multitone Wireline Receiver Datapath With Far-End Crosstalk Cancellation on RFSoC Platform. IEEE Transactions on Circuits and Systems II: Express Briefs, 71(11), 4738–4742. doi: 10.1109/TCSII.2024.3410688 | - |
| dc.description.isOpenAccess | FALSE | - |
| dc.subject.keywordAuthor | Serial link | - |
| dc.subject.keywordAuthor | ADC-based serial link | - |
| dc.subject.keywordAuthor | wireline transceiver | - |
| dc.subject.keywordAuthor | discrete multitone | - |
| dc.subject.keywordAuthor | DMT | - |
| dc.subject.keywordAuthor | far-end crosstalk | - |
| dc.subject.keywordAuthor | FEXT | - |
| dc.subject.keywordAuthor | field-programmable gate array | - |
| dc.subject.keywordAuthor | FPGA | - |
| dc.subject.keywordAuthor | RFSoC | - |
| dc.citation.endPage | 4742 | - |
| dc.citation.number | 11 | - |
| dc.citation.startPage | 4738 | - |
| dc.citation.title | IEEE Transactions on Circuits and Systems II: Express Briefs | - |
| dc.citation.volume | 71 | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.type.docType | Article | - |