Communities & Collections
Researchers & Labs
Titles
DGIST
LIBRARY
DGIST R&D
Detail View
Department of Electrical Engineering and Computer Science
Theses
Master
Dual-Annealing Dopant Activation for Contact Resistance Reduction in Silicon
Geuntae Park
Department of Electrical Engineering and Computer Science
Theses
Master
Citations
WEB OF SCIENCE
Citations
SCOPUS
Metadata Downloads
XML
Excel
Title
Dual-Annealing Dopant Activation for Contact Resistance Reduction in Silicon
Alternative Title
실리콘 접촉 저항 감소를 위한 이중 열처리 불순물 활성화
DGIST Authors
Geuntae Park
;
Hyuk-Jun Kwon
;
Jae-Eun Jang
Advisor
권혁준
Co-Advisor(s)
Jae-Eun Jang
Issued Date
2024
Awarded Date
2024-08-01
Citation
Geuntae Park. (2024). Dual-Annealing Dopant Activation for Contact Resistance Reduction in Silicon. doi: 10.22677/THESIS.200000802734
Type
Thesis
Description
Dual-annealing Activation, Contact resistivity, Silicon
Table Of Contents
List of Contents
Abstract i
List of contents ii
List of tables iii
List of figures vi
Ⅰ. INTRODUCTION
1.1 Contact Resistance 1
1.1.1 Contact Resistance and Contact Resistivity 1
1.1.2 Carrier Transport at Metal-semiconductor 3
1.1.3 Ultra Low Contact Resistivity for Advanced CMOS Trasistor 5
1.1.4 Extraction of Contact Resistance 6
1.1.4.1 TLM and CTLM Structure 6
1.1.4.2 MR-CTLM Structure 8
1.2 Dual-annealing Dopants Activation 10
1.2.1 Annealing Method for Dopant Activation 10
1.2.2 Dual-annealing Activation Process for Shallow Junction 11
II. EXPERIMENTAL DETAIL
2.1 Fabrication & Structure 15
III. RESULT AND DISCUSSION
3.1 Phosphorus Activation in Silicon by Dual-annealing Process 22
3.2 Capping Layer Effect for Dual-annealing Activation 28
IV. CONCLUSION
URI
http://hdl.handle.net/20.500.11750/57635
http://dgist.dcollection.net/common/orgView/200000802734
DOI
10.22677/THESIS.200000802734
Degree
Master
Department
Department of Electrical Engineering and Computer Science
Publisher
DGIST
Show Full Item Record
File Downloads
There are no files associated with this item.
공유
공유하기
Total Views & Downloads