WEB OF SCIENCE
SCOPUS
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, Geumtae | - |
| dc.contributor.author | Seo, Eun-Young | - |
| dc.contributor.author | Lee, Yongwoo | - |
| dc.contributor.author | Kim, Young-Sik | - |
| dc.contributor.author | No, Jong-Seon | - |
| dc.date.accessioned | 2025-01-22T17:40:14Z | - |
| dc.date.available | 2025-01-22T17:40:14Z | - |
| dc.date.created | 2025-01-22 | - |
| dc.date.issued | 2024-12 | - |
| dc.identifier.issn | 2079-9292 | - |
| dc.identifier.uri | http://hdl.handle.net/20.500.11750/57678 | - |
| dc.description.abstract | The number theoretic transform (NTT) is a fundamental operation in cryptography, especially for lattice-based cryptographic schemes. This paper introduces LazyNTT, a novel method that reduces the number of Montgomery multiplications required in the NTT computation by replacing some of them with standard multiplication without modular reduction. This approach enhances the performance of the NTT computation and modular polynomial multiplication in lattice-based cryptographic schemes. The proposed LazyNTT can be generalized by increasing the number of standard multiplications. The experimental results show that the proposed LazyNTT improves the cycle counts of the NTT by up to (Formula presented.) and (Formula presented.), respectively, by allowing two and one standard multiplications. © 2024 by the authors. | - |
| dc.language | English | - |
| dc.publisher | MDPI | - |
| dc.title | Lazy Modular Reduction for NTT | - |
| dc.type | Article | - |
| dc.identifier.doi | 10.3390/electronics13244887 | - |
| dc.identifier.wosid | 001387771700001 | - |
| dc.identifier.scopusid | 2-s2.0-85213251050 | - |
| dc.identifier.bibliographicCitation | Kim, Geumtae. (2024-12). Lazy Modular Reduction for NTT. Electronics, 13(24). doi: 10.3390/electronics13244887 | - |
| dc.description.isOpenAccess | TRUE | - |
| dc.subject.keywordAuthor | number theoretic transform (NTT) | - |
| dc.subject.keywordAuthor | Montgomery multiplication | - |
| dc.subject.keywordAuthor | modular reduction | - |
| dc.subject.keywordAuthor | post-quantum cryptography (PQC) | - |
| dc.subject.keywordAuthor | lattice-based cryptography | - |
| dc.citation.number | 24 | - |
| dc.citation.title | Electronics | - |
| dc.citation.volume | 13 | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Computer Science; Engineering; Physics | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems; Engineering, Electrical & Electronic; Physics, Applied | - |
| dc.type.docType | Article | - |
Department of Electrical Engineering and Computer Science