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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Park, Pangi | - |
| dc.contributor.author | Lee, Junghyup | - |
| dc.contributor.author | Cho, Seonghwan | - |
| dc.date.accessioned | 2025-01-31T22:40:16Z | - |
| dc.date.available | 2025-01-31T22:40:16Z | - |
| dc.date.created | 2024-04-01 | - |
| dc.date.issued | 2024-02-19 | - |
| dc.identifier.isbn | 9798350306200 | - |
| dc.identifier.issn | 2376-8606 | - |
| dc.identifier.uri | http://hdl.handle.net/20.500.11750/57832 | - |
| dc.description.abstract | Improving the temperature stability of the reference current (IREF) is essential for the reliable operation of precision electronics for various applications, including automotive and industrial sensors. There are several approaches to generate a temperature-stable IREF, which include a weighted sum of PTAT and CTAT currents, dividing a reference voltage by a resistor with a similar temperature coefficient (TC) [1-3], and biasing a MOSFET at its zero-temperature-coefficient bias point [4]. While these techniques can remove the first-order TC, the remaining curvature due to the second-order TC limits the achievable temperature stability. In [5], the curvature in a reference current is corrected by using a curvature-corrected bandgap reference voltage and a switched capacitor resistor. However, it requires a stable and bulky reference oscillator (e.g., crystal). © 2024 IEEE. | - |
| dc.language | English | - |
| dc.publisher | IEEE Solid-State Circuits Society | - |
| dc.relation.ispartof | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | - |
| dc.title | 3.1 A PVT-Insensitive Sub-Ranging Current Reference Achieving 11.4ppm/°C from -20°C to 125°C | - |
| dc.type | Conference Paper | - |
| dc.identifier.doi | 10.1109/ISSCC49657.2024.10454371 | - |
| dc.identifier.scopusid | 2-s2.0-85188075043 | - |
| dc.identifier.bibliographicCitation | Park, Pangi. (2024-02-19). 3.1 A PVT-Insensitive Sub-Ranging Current Reference Achieving 11.4ppm/°C from -20°C to 125°C. International Solid-State Circuits Conference, 54–56. doi: 10.1109/ISSCC49657.2024.10454371 | - |
| dc.identifier.url | https://www.isscc.org/past-conferences | - |
| dc.citation.conferenceDate | 2024-02-18 | - |
| dc.citation.conferencePlace | US | - |
| dc.citation.conferencePlace | San Francisco | - |
| dc.citation.endPage | 56 | - |
| dc.citation.startPage | 54 | - |
| dc.citation.title | International Solid-State Circuits Conference | - |
Department of Electrical Engineering and Computer Science