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Wafer-scale fabrication of memristive passive crossbar circuits for brain-scale neuromorphic computing
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dc.contributor.author Choi, Sanghyeon -
dc.contributor.author Bezugam, Sai Sukruth -
dc.contributor.author Bhattacharya Tinish -
dc.contributor.author Kwon, Dongseok -
dc.contributor.author Strukov, Dmitri B. -
dc.date.accessioned 2025-11-03T10:40:10Z -
dc.date.available 2025-11-03T10:40:10Z -
dc.date.created 2025-10-31 -
dc.date.issued 2025-10 -
dc.identifier.issn 2041-1723 -
dc.identifier.uri https://scholar.dgist.ac.kr/handle/20.500.11750/59141 -
dc.description.abstract Memristive passive crossbar circuits hold great promise for neuromorphic computing, offering high integration density combined with massively parallel operation. However, scaling up the integration complexity of such circuits remains challenging due to low device yield, stemming from the intrinsic properties of filamentary switching and limitations in current crossbar fabrication technologies. Here, we report a scalable passive crossbar device technology achieved through a co-design approach for memristors and crossbar structures. The proposed hardware platform is fabricated using CMOS-compatible processes without complex and high-temperature steps, enabling high device yield along with reliable and multibit operation. Importantly, the fabrication process is successfully scaled to a 4-inch wafer, maintaining an average device yield (>similar to 95%) and preserving key switching characteristics. The potential of this platform is showcased by implementing image classification of the fashion MNIST benchmark with an ex-situ trained spiking neural network. We believe that our work represents a significant step toward brain-scale neuromorphic computing systems. -
dc.language English -
dc.publisher Nature Publishing Group -
dc.title Wafer-scale fabrication of memristive passive crossbar circuits for brain-scale neuromorphic computing -
dc.type Article -
dc.identifier.doi 10.1038/s41467-025-63831-2 -
dc.identifier.wosid 001586620700034 -
dc.identifier.scopusid 2-s2.0-105017638090 -
dc.identifier.bibliographicCitation Nature Communications, v.16, no.1 -
dc.description.isOpenAccess TRUE -
dc.subject.keywordPlus INTEGRATION -
dc.subject.keywordPlus HARDWARE IMPLEMENTATION -
dc.subject.keywordPlus NEURAL-NETWORKS -
dc.subject.keywordPlus ARRAYS -
dc.subject.keywordPlus MEMORY -
dc.citation.number 1 -
dc.citation.title Nature Communications -
dc.citation.volume 16 -
dc.description.journalRegisteredClass scie -
dc.description.journalRegisteredClass scopus -
dc.relation.journalResearchArea Science & Technology - Other Topics -
dc.relation.journalWebOfScienceCategory Multidisciplinary Sciences -
dc.type.docType Article -
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최상현
Choi, Sanghyeon최상현

Department of Electrical Engineering and Computer Science

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