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BlockPIM: Enabling Sparse LLM Inference on Dense PIM Architectures

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Title
BlockPIM: Enabling Sparse LLM Inference on Dense PIM Architectures
Issued Date
2026-07
Citation
IEEE COMPUTER ARCHITECTURE LETTERS, v.25, no.2, pp.311 - 314
Type
Article
Author Keywords
Architecture ; DRAM chips ; Hardware ; Quantization (signal) ; Indexes ; Modeling ; Computer architecture ; Memory ; Metadata ; Indexing ; Processing-in-memor ; ylarge language models ; sparse inference ; model compression
ISSN
1556-6056
Abstract

Large Language Models (LLMs) have intensified the memory wall during inference, where performance is increasingly limited by memory bandwidth rather than computation. While Processing-In-Memory (PIM) and model compression techniques mitigate this issue, existing sparse PIM designs rely on CSR/COO formats that assume ultra-high sparsity (e.g., >90%), which is difficult to achieve in practical LLMs without significant accuracy loss. Moreover, fine-grained indexing introduces substantial metadata overhead, diminishing the benefits of pruning, especially under low-bit quantization. To address this mismatch, we propose BlockPIM, a PIM architecture that employs hardware-aligned coarse-grained pruning to efficiently execute sparse LLMs on standard dense computation units. BlockPIM replaces per-element indices with compact bitmaps and contiguous non-zero blocks, enabling sparse workloads to be processed directly on dense execution pipelines without complex index decoding or irregular control flow. Experimental results show that BlockPIM achieves up to 8.0 & times; and 3.6 & times; speedups over the NPU and state-of-the-art sparse PIM baselines, respectively, while reducing energy consumption by up to 95.2% and providing superior memory efficiency under practical accuracy constraints.

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URI
https://scholar.dgist.ac.kr/handle/20.500.11750/61019
DOI
10.1109/LCA.2026.3715204
Publisher
IEEE COMPUTER SOC
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