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Showing results 1 to 18 of 18

Thesis
An Energy-Efficient Wide-Supply-Range Stimulation System in Standard CMOS Process
  • Jeongyoon Wie
  • 2023
  • Jeongyoon Wie. (2023). An Energy-Efficient Wide-Supply-Range Stimulation System in Standard CMOS Process. doi: 10.22677/THESIS.200000656806
  • DGIST
  • View : 257
  • Download : 0
Thesis
An Energy-scalable and Low-power Inference Hardware for Deep Learning
  • Sangwoo Jung
  • 2025
  • Sangwoo Jung. (2025). An Energy-scalable and Low-power Inference Hardware for Deep Learning. doi: 10.22677/THESIS.200000844622
  • DGIST
  • View : 384
  • Download : 0
Thesis
Area-Efficient High-Speed ADCs For Wireline Data Communications
  • Eunki Song
  • 2024
  • Eunki Song. (2024). Area-Efficient High-Speed ADCs For Wireline Data Communications. doi: 10.22677/THESIS.200000803503
  • DGIST
  • View : 367
  • Download : 0
Thesis
Automotive SerDes PCS Design and PAM-4 Receiver BER Characterization With RS-FEC and Correlated Noise
  • Songi Cheon
  • 2026
  • DGIST
  • View : 11
  • Download : 0
Thesis
Blind Equalizers for High-Speed Optical Links
  • Kanghyun Ko
  • 2026
  • DGIST
  • View : 67
  • Download : 0
Thesis
CNN Based Non-linear SerDes Equalizer
  • Eve Cha
  • 2026
  • DGIST
  • View : 17
  • Download : 0
Thesis
Design and Implementation of a High-Speed DAQ/AWG Integrated System Based on Zynq UltraScale+ RFSoC
  • Sungyu Song
  • 2026
  • DGIST
  • View : 14
  • Download : 0
Thesis
Design of 32-Gbps Transmitter With Configurable 3-Tap FFE For High-Speed Wireline Interfaces
  • Minseong Gong
  • 2026
  • DGIST
  • View : 10
  • Download : 0
Thesis
Design of a High-Speed SerDes Analog Front-End and Eye Monitor
  • Heo Dongryul
  • 2026
  • DGIST
  • View : 129
  • Download : 0
Thesis
Design of Phase-Interpolator-Based Muller-Mueller Clock and Data Recovery for High-Speed Wireline
  • Seongjin Kim
  • 2026
  • DGIST
  • View : 129
  • Download : 0
Thesis
Design Of Pipelined SAR ADC For Wireline Data Communications
  • Heewon Sung
  • 2025
  • DGIST
  • View : 103
  • Download : 0
Thesis
Design Of Time-Based ADC Using GROSC-Based TDC For Wireline Data Communications
  • Jaemin Lee
  • 2026
  • DGIST
  • View : 26
  • Download : 0
Thesis
Dynamic Precision Control of a DNN Training Accelerator Using RISC-V Processor
  • Jeik Choi
  • 2023
  • Jeik Choi. (2023). Dynamic Precision Control of a DNN Training Accelerator Using RISC-V Processor. doi: 10.22677/THESIS.200000655606
  • DGIST
  • View : 526
  • Download : 0
Thesis
Equalizer Adaptation Utilizing Data Pattern-Based BBPD
  • Yunseong Shim
  • 2024
  • Yunseong Shim. (2024). Equalizer Adaptation Utilizing Data Pattern-Based BBPD. doi: 10.22677/THESIS.200000728627
  • DGIST
  • View : 170
  • Download : 0
Thesis
Hardware Acceleration with Microscaling Formats for Deep Learning Inference and Training
  • Jahyun Koo
  • 2026
  • DGIST
  • View : 409
  • Download : 0
Thesis
Hardware-Software Co-design Methodology for Highly-Efficient Operation of Spiking Neural Networks
  • Sangwoo Hwang
  • 2025
  • Sangwoo Hwang. (2025). Hardware-Software Co-design Methodology for Highly-Efficient Operation of Spiking Neural Networks. doi: 10.22677/THESIS.200000841867
  • DGIST
  • View : 379
  • Download : 0
Thesis
High-Speed ADC Design for Wireline Receiver
  • Seonho Gong
  • 2024
  • Seonho Gong. (2024). High-Speed ADC Design for Wireline Receiver. doi: 10.22677/THESIS.200000725814
  • DGIST
  • View : 191
  • Download : 0
Thesis
Low Power Recording Systems for Bioelectrical Signal Acquisition
  • Taeryoung Seol
  • 2024
  • Taeryoung Seol. (2024). Low Power Recording Systems for Bioelectrical Signal Acquisition. doi: 10.22677/THESIS.200000726078
  • DGIST
  • View : 232
  • Download : 0
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