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Article
A 112-Gb/s Discrete Multitone Wireline Receiver Datapath With Time-Interleaved Time-Based ADC in 5-nm FinFET
  • Lee, Jaewon ; 
  • Francese, Pier-Andrea ; 
  • Braendli, Matthias ; 
  • Morf, Thomas ; 
  • Kossel, Marcel ; 
  • Jang, Seoyoung ; 
  • Choi, Yujin ; 
  • Kim, Donggeon ; 
  • Jang, Taekwang ; 
  • Kim, Gain
  • 2026-01
  • IEEE Journal of Solid-State Circuits, v.61, no.1, pp.8 - 19
  • Institute of Electrical and Electronics Engineers
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Article
An 8b 1.0-to-1.25GS/s Time-Based ADC with Bipolar VTC and Sense Amplifier Latch Interpolated Gated Ring Oscillator TDC
  • Yonar, A. Serdar ; 
  • Francese, Pier Andrea ; 
  • Brandli, Matthias ; 
  • Kossel, Marcel ; 
  • Prathapan, Mridula ; 
  • Morf, Thomas ; 
  • Ruffino, Andrea ; 
  • Kim, Gain ; 
  • Jang, Taekwang
  • 2023-07
  • Yonar, A. Serdar. (2023-07). An 8b 1.0-to-1.25GS/s Time-Based ADC with Bipolar VTC and Sense Amplifier Latch Interpolated Gated Ring Oscillator TDC. IEEE Solid-State Circuits Letters, 6, 196–196. doi: 10.1109/LSSC.2023.3293273
  • Institute of Electrical and Electronics Engineers Inc.
  • View : 555
  • Download : 0
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