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Showing results 6 to 8 of 8

Issue Date	Title Author(s) Journal	View
2020-09	Balancing Computation Loads and Optimizing Input Vector Loading in LSTM Accelerators Park, Junki ; Yi, Wooseok ; Ahn, Daehyun ; Kung, Jaeha ; Kim, Jae-Joon Institute of Electrical and Electronics Engineers, 2020-09	442
2022-03	A 40-nm 118.44-TOPS/W Voltage-Sensing Compute-in-Memory RRAM Macro With Write Verification and Multi-Bit Encoding Yoon, Jong-Hyeok ; Chang, Muya ; Khwa, Win-San ; Chih, Yu-Der ; Chang, Meng-Fan ; Raychowdhury, Arijit IEEE Journal of Solid-State Circuits, v.57, no.3, pp.845 - 857, 2022-03	165
2022-01	A 40-nm, 64-Kb, 56.67 TOPS/W Voltage-Sensing Computing-In-Memory/Digital RRAM Macro Supporting Iterative Write With Verification and Online Read-Disturb Detection Yoon, Jong-Hyeok ; Chang, Muya ; Khwa, Win-San ; Chih, Yu-Der ; Chang, Meng-Fan ; Raychowdhury, Arijit IEEE Journal of Solid-State Circuits, v.57, no.1, pp.68 - 79, 2022-01	355

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