Department of Electrical Engineering and Computer Science Theses Master
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dc.contributor.advisor 이성진 -
dc.contributor.author Hanbyeol Kim -
dc.date.accessioned 2019-08-22T16:01:43Z -
dc.date.available 2019-08-22T16:01:43Z -
dc.date.issued 2019 -
dc.identifier.uri http://dgist.dcollection.net/common/orgView/200000220983 en_US
dc.identifier.uri http://hdl.handle.net/20.500.11750/10480 -
dc.description FTL, Memory reduction -
dc.description.statementofresponsibility prohibition -
dc.description.tableofcontents Abstract ..........................................................................................................i
List of contents................................................................................................ii
Ⅰ. INTRODUCTION ................................................................................... 2
Ⅱ. BACKGROUND ........................................................................................... 5
2.1 Table-based Address Translation ......................................................... 5
2.2 Bloom Filter Basic .............................................................................. 8
Ⅲ. BLOOM FILTER-BASED ADDRESS TRANSLATION ................. 10
3.1 Overall Architecture .......................................................................... 10
3.2 Determination of FPR ....................................................................... 13
3.3 Determination of k ............................................................................ 15
3.4 Reblooming ........................................................................................ 17
Ⅳ. OPTIMIZATION OF BLOOMFTL ....................................................... 20
4.1 Optimizing Lookup Speed ................................................................. 20
4.2 Garbage Collection ............................................................................ 22
4.3 Wear Leveling ................................................................................... 24
Ⅴ. EXPERIMENTS .......................................................................................... 25
5.1 Experiments Setup ............................................................................. 25
5.2 Performance Evaluation ..................................................................... 26
5.3 RAF and WAF Comparison ............................................................. 27
5.4 FPR, RAF, and Memory Requirements .......................................... 30
5.5 Effectiveness of Reblooming ............................................................ 32
Ⅵ. CONCLUSION .......................................................................................... 33
References ........................................................................................................... 35		 -
dc.format.extent 35 -
dc.language eng -
dc.publisher DGIST -
dc.source /home/dspace/dspace53/upload/200000220983.pdf -
dc.subject Computer Storage SysteMaster -
dc.title BloomFTL: Probability-based Address Translation Using Bloom Filter for Large-capacity SSDs -
dc.title.alternative BloomFTL: Probability-based Address Translation Using Bloom Filter for Large-capacity SSDs -
dc.type Thesis -
dc.identifier.doi 10.22677/thesis.200000220983 -
dc.description.degree Master -
dc.contributor.department Department of Information and Communication Engineering -
dc.contributor.coadvisor Sunghyun Cho -
dc.date.awarded 2019-08 -
dc.publisher.location Daegu -
dc.description.database dCollection -
dc.citation XT.IM 김92 201908 -
dc.date.accepted 2019-07-01 -
dc.contributor.alternativeDepartment 정보통신융합전공 -
dc.embargo.liftdate 2021-07-02 -
dc.contributor.affiliatedAuthor Lee, Sungjin -
dc.contributor.affiliatedAuthor Cho, Sunghyun -
dc.contributor.affiliatedAuthor Kim, Hanbyeol -
dc.contributor.alternativeName 조성현 -
dc.contributor.alternativeName 김한별 -
dc.contributor.alternativeName Sungjin Lee -
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