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MapReduce Architecture for a Single Computing Node of Multiprocessors

MapReduce Architecture for a Single Computing Node of Multiprocessors
Translated Title
멀티프로세서로 구성된 싱글 컴퓨팅 노드상의 맵리듀스 아키텍쳐
Song, Hyo Chan
DGIST Authors
Song, Hyo Chan; Kim, Min Soo; Han, Byung Chan
Kim, Min Soo
Han, Byung Chan
Issue Date
Available Date
Degree Date
2013. 2
MapReduceHeterogeneous computingGPGPUmulticoremanycore
Recently, the paradigm of micro-architecture design of CPUs is shifting to on-chip multi-core processors, and moreover, to many-core coprocessors for general computing such as NVIDIA’s Tesla and Intel’s Xeon Phi. Meanwhile, the MapReduce framework has been extensively used and studied for big data analysis, which runs typically on a large cluster of cheap commodity nodes. We propose a new MapReduce framework called Hybrid-core based big Data (Real-time) Analysis (HYDRA) that regards a single node equipped with both multi-core CPUs and many-core GPUs as a cluster of nodes, where a single processor plays a role of a single node. By fully exploiting the computing power of the modern heterogeneous-core systems, HYDRA could achieve a comparable performance with a small-scale cluster of nodes. Especially, HYDRA is based on the sharedmemory architecture, and so, has no cost of transferring data via network in a shuffle step of MapReduce, whereas the conventional MapReduce could have a large cost in that step depending on a kind of task. Under the proposed framework, we propose two strategies,“Processor As A Node” (PAAN) and “GPU Mapper CPU Reducer” (GMCR). PAAN considers a multiprocessor of either CPU or GPU as a node in the same way. On the other hand, GMCR considers GPUs as only mapper nodes and CPUs as only reducer nodes dissimilarly.The proposed strategies tackle the challenging issues such as how to cooperate two types of processors (i.e., CPUs and GPUs), how to manage different memory hierarchies in those types, and how to minimize data communication overhead between CPUs and GPUs. Extensive experimental results show that HYDRA outperforms the conventional MapReduce on a cluster of eight commodity nodes by up to more than 14 times. ⓒ 2013 DGIST
Table Of Contents
Ⅰ. INTRODUCTION 1 -- Ⅱ. BACKGROUND 4 -- 2.1 Notations 4 -- 2.2 MapReduce 4 -- 2.3 General Purpose computing on Graphics Processing Unit (GPGPU) 7 -- Ⅲ. THE HYDRA SYSTEM 9 -- 3.1 System Overview 9 -- 3.2 Processor As A Node (PAAN) 9 -- 3.2.1 Strategy Architecture 10 -- 3.2.2 CPU Node Workflow 13 -- 3.2.3 GPU Node Workflow 13 -- 3.3 GPU Mapper CPU Reducer (GMCR) 17 -- 3.3.1 Strategy Architecture 18 -- 3.3.2 GPU Mapper Workflow 19 -- 3.3.3 CPU Reducer Workflow 22 -- Ⅳ. EVALUATI0ON 25 -- 4.1 Experimental Setup 25 -- 4.2 Application – Word Count 25 -- 4.3 Performance Evaluation 26 -- Ⅴ. REALTED WORK 30 -- 5.1 MapReduce Framework with the CPU 30 -- 5.2 MapReduce Framework with the Accelerators 30 -- 5.3 Programming Tools for the GPGPU 32 -- Ⅵ. CONCLUSIONS 33
Information and Communication Engineering
Related Researcher
  • Author Kim, Min-Soo InfoLab
  • Research Interests Big Data Systems; Big Data Mining & Machine Learning; Big Data Bioinformatics; 데이터 마이닝 및 빅데이터 분석; 바이오인포메틱스 및 뉴로인포메틱스; 뇌-기계 인터페이스(BMI)
Department of Information and Communication EngineeringThesesMaster

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