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dc.contributor.author Kim, Sejin -
dc.contributor.author Kim, Jungwoo -
dc.contributor.author Jang, Yongjoo -
dc.contributor.author Kung, Jaeha -
dc.contributor.author Lee, Sungjin -
dc.date.accessioned 2023-01-17T14:40:18Z -
dc.date.available 2023-01-17T14:40:18Z -
dc.date.created 2023-01-12 -
dc.date.issued 2022-07 -
dc.identifier.issn 1556-6056 -
dc.identifier.uri http://hdl.handle.net/20.500.11750/17472 -
dc.description.abstract Embedding layers, which are widely used in various deep learning (DL) applications, are very large in size and are increasing. We propose scalable embedding memory system (SEMS) to deal with the inference of DL applications with a large embedding layer. SEMS is built using scalable embedding memory (SEM) modules, which include FPGA for acceleration. In SEMS, PCIe bus, which is scalable and versatile, is used to expand the system memory and processing in SEMs reduces the amount of data transferred from SEMs to host, improving the effective bandwidth of PCIe. In order to achieve better performance, we apply various optimization techniques at different levels. We develop SEMlib, a Python library to provide convenience in using SEMS. We implement a proof-of-concept prototype of SEMS and using SEMS yields DLRM execution time that is 32.85x faster than that of a CPU-based system when there is a lack of DRAM to hold the entire embedding layer. © 2022 IEEE. -
dc.language English -
dc.publisher Institute of Electrical and Electronics Engineers -
dc.title SEMS: Scalable Embedding Memory System for Accelerating Embedding-Based DNNs -
dc.type Article -
dc.identifier.doi 10.1109/LCA.2022.3227560 -
dc.identifier.scopusid 2-s2.0-85146646758 -
dc.identifier.bibliographicCitation IEEE Computer Architecture Letters, v.21, no.2, pp.157 - 160 -
dc.description.isOpenAccess FALSE -
dc.subject.keywordAuthor DNN accelerators -
dc.subject.keywordAuthor embeddings -
dc.subject.keywordAuthor recommender systems -
dc.subject.keywordAuthor system for machine learning -
dc.citation.endPage 160 -
dc.citation.number 2 -
dc.citation.startPage 157 -
dc.citation.title IEEE Computer Architecture Letters -
dc.citation.volume 21 -

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