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DualPIM: A Dual-Precision and Low-Power CNN Inference Engine Using SRAM- and eDRAM-based Processing-in-Memory Arrays

Title
DualPIM: A Dual-Precision and Low-Power CNN Inference Engine Using SRAM- and eDRAM-based Processing-in-Memory Arrays
Author(s)
Jung, SangwooLee, JaehyunNoh, HuiseongYoon, Jong-HyeokKung, Jaeha
Issued Date
2022-06-14
Citation
4th IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022, pp.70 - 73
Type
Conference Paper
ISBN
9781665409964
Abstract
Recently, machine learning community has focused on developing deep learning models that are not only accurate but also efficient to deploy them on resource-limited devices. One popular approach to improve the model efficiency is to aggressively quantize both features and weight parameters. However, the quantization generally entails accuracy degradation thus additional compensation techniques are required. In this work, we present a novel network architecture, named DualNet, that leverages two separate bit-precision paths to effectively achieve high accuracy and low model complexity. On top of this new network architecture, we propose to utilize both SRAM-and eDRAM-based processing-in-memory (PIM) arrays, named DualPIM, to run each computing path in a DualNet at a dedicated PIM array. As a result, the proposed DualNet significantly reduces the energy consumption by 81% on average compared to other quantized neural networks (i.e., 4-bit and ternary), while achieving 13% higher accuracy on average.
URI
http://hdl.handle.net/20.500.11750/46837
DOI
10.1109/AICAS54282.2022.9869905
Publisher
Institute of Electrical and Electronics Engineers Inc.
Related Researcher
  • 윤종혁 Yoon, Jong-Hyeok
  • Research Interests Artificial intelligence; SLAM; edge intelligence; in-memory computing; multi-standard Ethernet transceiver design
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Appears in Collections:
Department of Electrical Engineering and Computer Science Intelligent Digital Systems Lab 2. Conference Papers
Department of Electrical Engineering and Computer Science Intelligent Integrated Circuits and Systems Lab 2. Conference Papers

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