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Division of Nanotechnology
1. Journal Articles
Dual-Gate Black Phosphorus Field-Effect Transistors with Hexagonal Boron Nitride as Dielectric and Passivation Layers
Ra, Hyun Soo
;
Lee, A Young
;
Kwak, Do Hyun
;
Jeong, Min Hye
;
Lee, Jong Soo
Division of Nanotechnology
1. Journal Articles
Department of Energy Science and Engineering
MNEDL(Multifunctional Nanomaterials & Energy Devices Lab)
1. Journal Articles
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Title
Dual-Gate Black Phosphorus Field-Effect Transistors with Hexagonal Boron Nitride as Dielectric and Passivation Layers
Issued Date
2018-01
Citation
Ra, Hyun Soo. (2018-01). Dual-Gate Black Phosphorus Field-Effect Transistors with Hexagonal Boron Nitride as Dielectric and Passivation Layers. ACS Applied Materials & Interfaces, 10(1), 925–932. doi: 10.1021/acsami.7b16809
Type
Article
Author Keywords
black phosphorus
;
h-BN
;
dielectric layer
;
aging effect
;
global and local gate
;
mobility
;
subthreshold slope
Keywords
2-DIMENSIONAL MATERIAL
;
MOS2 TRANSISTORS
;
MONOLAYER MOS2
;
PERFORMANCE
;
TRANSPORT
;
SEMICONDUCTORS
;
PHOTORESPONSE
;
PHOTODETECTOR
;
DEPOSITION
;
CONTACTS
ISSN
1944-8244
Abstract
Two-dimensional black phosphorus (BP) has attracted much attention recently because of its applicability in high-performance electronic and optoelectronic devices. BP field-effect transistors (FETs) with a tunable band gap (0.3-1.5 eV) have demonstrated a high on-off current ratio and a high hole mobility with an ambipolar behavior in global-gated devices. However, local-gated BP FETs for integrated circuits have been reported with only p-type behaviors and a low on-current compared with global-gated BP FETs. Furthermore, BP, which is not stable in air, forms sharp spikes on its surface when exposed to humid air. This phenomenon plays a role in accelerating the degradation of the electrical properties of BP devices, which can occur even within a day. In this paper, we first demonstrate the origin of transport limitations of local-gated BP FETs by comparing the transport properties of hexagonal boron nitride (h-BN)-based device architectures with those of a bottom-gated BP FET on a Si/SiO2 substrate. By using h-BN as passivation and dielectric layers, BP FETs with a low gate operating voltage were fabricated with two different transistor geometries: top-gated and bottom-gated FETs. The highest mobility extracted from the global-gated BP FETs was 249 cm2 V-1 s-1 with a subthreshold swing of 848 mV dec-1. © 2017 American Chemical Society.
URI
http://hdl.handle.net/20.500.11750/5597
DOI
10.1021/acsami.7b16809
Publisher
American Chemical Society
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