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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, Tae-Hyeon | - |
| dc.contributor.author | Lee, HyunKi | - |
| dc.contributor.author | Ok, Seung-Ho | - |
| dc.date.accessioned | 2024-12-08T16:10:25Z | - |
| dc.date.available | 2024-12-08T16:10:25Z | - |
| dc.date.created | 2024-08-20 | - |
| dc.date.issued | 2024-08 | - |
| dc.identifier.issn | 2079-9292 | - |
| dc.identifier.uri | http://hdl.handle.net/20.500.11750/57253 | - |
| dc.description.abstract | Three-dimensional(3D) shape measurement using point clouds has recently gained significant attention. Phase measuring profilometry (PMP) is widely preferred for its robustness against external lighting changes and high-precision results. However, PMP suffers from long computation times due to complex calculations and its high memory usage. It also faces a 2π ambiguity issue, as the measured phase is limited to the 2π range. This is typically resolved using dual-wavelength methods. However, these methods require separate measurements of phase changes at two wavelengths, increasing the data processing volume and computation times. Our study addresses these challenges by implementing a 3D shape measurement system on a System-on-Chip (SoC)-type Field-Programmable Gate Array (FPGA). We developed a PMP algorithm with dual-wavelength methods, accelerating it through high-level synthesis (HLS) on the FPGA. This hardware implementation significantly reduces computation time while maintaining measurement accuracy. The experimental results demonstrate that our system operates correctly on the SoC-type FPGA, achieving computation speeds approximately 11.55 times higher than those of conventional software implementations. Our approach offers a practical solution for real-time 3D shape measurement, potentially benefiting applications in fields such as quality control, robotics, and computer vision. © 2024 by the authors. | - |
| dc.language | English | - |
| dc.publisher | MDPI | - |
| dc.title | Implementation of an FPGA-Based 3D Shape Measurement System Using High-Level Synthesis | - |
| dc.type | Article | - |
| dc.identifier.doi | 10.3390/electronics13163282 | - |
| dc.identifier.wosid | 001305214400001 | - |
| dc.identifier.scopusid | 2-s2.0-85202669864 | - |
| dc.identifier.bibliographicCitation | Kim, Tae-Hyeon. (2024-08). Implementation of an FPGA-Based 3D Shape Measurement System Using High-Level Synthesis. Electronics, 13(16), 1–14. doi: 10.3390/electronics13163282 | - |
| dc.description.isOpenAccess | TRUE | - |
| dc.subject.keywordAuthor | 3D shape measurement | - |
| dc.subject.keywordAuthor | phase measuring profilometry (PMP) | - |
| dc.subject.keywordAuthor | FPGA | - |
| dc.subject.keywordAuthor | high-level synthesis (HLS) | - |
| dc.subject.keywordAuthor | real-time processing | - |
| dc.subject.keywordPlus | REAL-TIME | - |
| dc.subject.keywordPlus | PHASE | - |
| dc.subject.keywordPlus | PROFILOMETRY | - |
| dc.citation.endPage | 14 | - |
| dc.citation.number | 16 | - |
| dc.citation.startPage | 1 | - |
| dc.citation.title | Electronics | - |
| dc.citation.volume | 13 | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Computer Science;Engineering;Physics | - |
| dc.relation.journalWebOfScienceCategory | Computer Science; Information SystemsEngineering; Electrical & ElectronicPhysics; Applied | - |
| dc.type.docType | Article | - |