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FPGA 기반 3차원 형상 측정 알고리즘 가속화
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Title
FPGA 기반 3차원 형상 측정 알고리즘 가속화
Alternative Title
Acceleration of FPGA-based 3D Shape Measurement Algorithm
Issued Date
2024-06-27
Citation
김태현. (2024-06-27). FPGA 기반 3차원 형상 측정 알고리즘 가속화. 대한전자공학회 2024년도 하계종합학술대회, 1347–1350.
Type
Conference Paper
Abstract
Among the non-contact 3D shape measurement techniques, Phase Measuring Profilometry (PMP) stands out for its robustness to changes in external lighting and its capability to capture high-precision shape data. The implementation of the dual-wavelength method allows for the expansion of the measurable range while maintaining resolution. However, applying the dual-wavelength method necessitates measuring phase shifts at both wavelengths, which increases the data processing and computation times. In this paper, we present a method to accelerate 3D shape measurement algorithms using SoC-type FPGAs to solve these time-related problems. Experimental results show that the 3D shape measurement algorithm operates correctly on the FPGA, and the computation speed has been accelerated by approximately 8.19 times compared to previous methods.
URI
http://hdl.handle.net/20.500.11750/57708
Publisher
대한전자공학회
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