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Department of Electrical Engineering and Computer Science
Computer Architecture and Systems Lab
3. Patents
메모리 인터리빙을 사용하는 계층 메모리 환경을 위한 동적 캐시 할당 방법
정진
;
소진인
;
이종건
;
김대훈
;
이환준
Department of Electrical Engineering and Computer Science
Computer Architecture and Systems Lab
3. Patents
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Title
메모리 인터리빙을 사용하는 계층 메모리 환경을 위한 동적 캐시 할당 방법
Alternative Title
PROCESSOR, SYSTEM, AND METHOD FOR DYNAMIC CACHE ALLOCATION
Country
US
Application Date
2024-02-28
Application No.
18/589,852
Registration Date
2025-07-15
Publication No.
12,360,900
Assignee
(재)대구경북과학기술원(50/0),(주)삼성전자(50/100)
URI
https://scholar.dgist.ac.kr/handle/20.500.11750/59306
18/589,852
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Related Researcher
Kim, Daehoon
김대훈
Department of Electrical Engineering and Computer Science
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