Title

Cr–WSe₂ Alloy for Contact Optimization of P-Type WSe₂ FETs

Alternative Title

P-형 WSe2 전계 효과 트랜지스터 접촉 저항 최소화를 위한 Cr-WSe2 합금화

DGIST Authors

Young-Jun Sim ; Hyuk-Jun Kwon ; Byeongmoon Lee

Advisor

권혁준

Co-Advisor(s)

Byeongmoon Lee

Issued Date

2026

Awarded Date

2026-02-01

Type

Thesis

Description

2D materials, WSe2, Contact resistance, Schottky barrier height, Alloy interface

Table Of Contents

List of Contents
Abstract i
List of contents ii
List of tables iv
List of figures v

Ⅰ. INTRONDUCTION
1.1 Device Scaling 1
1.1.1 2D materials for Device Scaling 2
1.1.2 Tungsten Diselenide (WSe2) for P-type Transistors 6
1.2 Contact Resistance 8
1.2.1 Fermi-Level Pinning 10
1.2.2 van der Waals Contact for Fermi Level Pinning Suppression 12

Ⅱ. EXPERIMENTAL DETAILS
2.1 Device Fabrication 14
2.2 Fabrication Issues 15
2.3 W1-xCrxSe2 Alloy Formation 17
2.4 Characterizations of WSe2 FETs 17
2.5 Gate Leakage of WSe2 FETs 18

Ⅲ. RESULTS AND DISCUSSIONS
3.1 Laser Annealing for W1-xCrxSe2 Alloy Formation 19
3.1.1 Process Overview 19
3.1.2 Electrical Characteristics of Laser Annealed Devices 20
3.2 Rapid Thermal Processing for W1-xCrxSe2 Alloy Formation 24
3.2.1 Process Conditions 24
3.2.2 Chemical State Analysis of W1-xCrxSe2 26
3.2.3 Energy Band Structure of W1-xCrxSe2 Alloy Interface 29
3.2.4 Extraction of Schottky Barrier Height 32
3.2.5 Extraction of Contact Resistance 34
3.2.6 Electrical Properties of W1-xCrxSe2 Alloy Interface Contact 37
3.2.7 Comparison with Other Metal 41
3.2.8 Stability of W1-xCrxSe2 Alloy Interface 43
3.2.9 Comparison with Previous Studies 44

Ⅳ. CONCLUSION 46

REFERENCE 48

URI

https://scholar.dgist.ac.kr/handle/20.500.11750/59710
http://dgist.dcollection.net/common/orgView/200000944459

DOI

10.22677/THESIS.200000944459

Degree

Master

Department

Department of Electrical Engineering and Computer Science

Publisher

DGIST

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