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A Broadband PVT-Insensitive All-nMOS Noise-Canceling Balun-LNA for Subgigahertz Wireless Communication Applications
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- Title
- A Broadband PVT-Insensitive All-nMOS Noise-Canceling Balun-LNA for Subgigahertz Wireless Communication Applications
- Issued Date
- 2021-02
- Citation
- Kim, Dongmin. (2021-02). A Broadband PVT-Insensitive All-nMOS Noise-Canceling Balun-LNA for Subgigahertz Wireless Communication Applications. IEEE Microwave and Wireless Components Letters, 31(2), 165–168. doi: 10.1109/LMWC.2020.3042233
- Type
- Article
- Author Keywords
- common-gate (CG) ; common-source (CS) ; diode-connected load ; low-noise amplifier (LNA) ; noise-canceling ; post linearization ; process ; voltage ; and temperature (PVT) variations ; subgigahertz ; wideband ; Noise measurement ; Transistors ; Gain ; Wireless communication ; Current measurement ; MOSFET ; Broadband communication ; Balun
- Keywords
- Voltage variation ; Broadband amplifiers ; Diode amplifiers ; Diodes ; Noise figure ; Transistors ; Common gate common sources ; Input return loss ; NMOS transistors ; Noise canceling ; Noise contributions ; Temperature variation ; Wireless communication applications ; Low noise amplifiers
- ISSN
- 1531-1309
- Abstract
-
A broadband process, voltage, and temperature (PVT)-insensitive noise-canceling balun-low-noise amplifier (LNA) was implemented in the 0.13-μm CMOS process for subgigahertz wireless communication applications. The proposed LNA is based on the traditional common-gate common-source (CGCS) balun-LNA topology, and it adopts the diode-connected loads to reduce the noise contribution originated from CGCS transistors and enhance the linearity due to post linearization. The auxiliary common-source (CS) amplifier with a diode-connected is added to reduce the overall noise figure (NF) of the LNA by sharing an input signal with CGCS transistors and applying its output signal to the diode-connected load of CS transistor. Because the voltage gain of the LNA is determined by the transconductance (gₘ) ratio of the same types of nMOS transistors, its power gain (S₂₁) and NF are quite roust over PVT variations. In experiments, it showed S₂₁ of 14 dB and NF of 4 dB with an input return loss (S₁₁) of greater than 10 dB at 450 MHz. Concerning voltage variation (1.08-1.32 V) and temperature variation (-20 °C ~ +80 °C), the worst variations in S₂₁ and NF were approximately 1.4 and 1.1 dB, respectively. IEEE
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- Publisher
- Institute of Electrical and Electronics Engineers
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Related Researcher
- Lee, Junghyup이정협
-
Department of Electrical Engineering and Computer Science
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