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Impact of laser annealing for CVD grown MoS2 thin film transistors in top gate structure

Impact of laser annealing for CVD grown MoS2 thin film transistors in top gate structure
Alternative Title
화학적 기상 증착법으로 성장시킨 이황화 몰리브덴 박막 트랜지스터의 상부 게이트 구조에서 레이저 열처리가 미치는 영향
Dong Jae Kwon
DGIST Authors
Dong Jae KwonHyuk-Jun KwonHongki Kang
Hongki Kang
Issued Date
Awarded Date
Laser Annealing, Molybdenum disulfide, Chemical Vapor Deposition, Top-gated structure, Thin Film Transistor, 상부 게이트 구조, 화학적 기상 증착법, 이황화 몰리브덴, 레이저 열처리, 박막 트랜지스터
Transition Metal Dichalcogenides (TMDs) are promising electronic materials due to their mechanical, electrical, and optical properties. Among them, Molybdenum disulfide (MoS2) is the most actively studied ma-terial due to the n-type semiconducting property in 2H phase, high carrier mobility, and tunable bandgap. MoS2 is mainly deposited by the mechanical exfoliation method using scotch tape, Physical Vapor Deposition (PVD), and Chemical Vapor Deposition (CVD). Especially, CVD is the preferred deposition method due to the thick-ness controllability of layer and large-scale process. However, the electrical properties of the CVD grown MoS2 thin film transistors (TFTs) are relatively poor such as low field-effect mobility and high subthreshold swing.

One of the approaches to improve these properties is thermal annealing, which uses a furnace to perform the overall thermal treatment. In order to investigate the reason why electrical properties are improved through thermal annealing, it is necessary to analyze the contact region and interface region separately. For this purpose, compared to conventional thermal annealing, which affects all parts, laser annealing is beneficial to local heat treatment. Consequently, this study investigates the effect of laser annealing on the interface region. Because the interface quality is poor due to CVD-grown MoS2 and ALD-deposited Al2O3, a new laser annealing method called “Gate Annealing(GA)” is proposed to study the change of the interface area.

Through the proposed method, it is confirmed that the change of electrical characteristics that the interface quality can be improved by effectively reducing traps. The reduced interface traps enhance the electrical char-acteristics such as decreased total electrical resistance, slightly increased the field-effect mobility, increased the on/off current ratio, decreased subthreshold swing, and negative shift of threshold voltage. These changes are supported by the quantitative analysis of MoO3 in the XPS results that GA can reduce resides. Besides, in the analysis using the Y-Function Method (YFM), intrinsic mobility is significantly increased compared to field-effect mobility. It can be seen that the GA method affects the improvement of interface quality. As a result, GA is a method that can contribute to electrical characteristics by improving the Al2O3/MoS2 interface by reducing the interface traps.
Table Of Contents
Ⅰ. Introduction 1
1.1 MoS2: One of the promising 2D material for electronic devices 1
1.2 Annealing process for enhancing the MoS2 TFTs 6
1.2.1 Effects of thermal annealing 6
1.2.2 Laser Annealing: Alternative method of thermal annealing 8
1.3 Merits of top-gated structures for MoS2 TFTs 11
1.4 Significance of thermal treatment for Al2O3/MoS2 interface 12

Ⅱ. Experimental Procedures 14
2.1 Fabrication process of top-gated CVD grown MoS2 TFTs 14
2.2 Configuration of Laser Annealing system 17
2.3 Experimental process of Laser Annealing process 18

Ⅲ. Result and Discussion 21
3.1 Analysis of electrical characteristics change through Gate Annealing 21
3.2 Evaluation of interface quality with Y-Function Method 38

Ⅳ. Conclusion 42
Ⅴ. Future Works 44
Ⅵ. Reference 45
Ⅶ. Acknowledgement 48
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Department of Electrical Engineering and Computer Science Theses Master


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