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dc.contributor.author Guo, Yunhui -
dc.contributor.author Imani, Mohsen -
dc.contributor.author Kang, Jaeyoung -
dc.contributor.author Salamat, Sahand -
dc.contributor.author Morris, Justin -
dc.contributor.author Aksanli, Baris -
dc.contributor.author Kim, Yeseong -
dc.contributor.author Rosing, Tajana -
dc.date.accessioned 2023-12-26T19:12:26Z -
dc.date.available 2023-12-26T19:12:26Z -
dc.date.created 2021-03-02 -
dc.date.issued 2021-01-18 -
dc.identifier.isbn 9781450379991 -
dc.identifier.uri http://hdl.handle.net/20.500.11750/46952 -
dc.description.abstract Recommender systems are important tools for many commercial applications such as online shopping websites. There are several issues that make the recommendation task very challenging in practice. The first is that an efficient and compact representation is needed to represent users, items and relations. The second issue is that the online markets are changing dynamically, it is thus important that the recommendation algorithm is suitable for fast updates and hardware acceleration. In this paper, we propose a new hardware-friendly recommendation algorithm based on Hyperdimensional Computing, called HyperRec. Unlike existing solutions which leverages floating-point numbers for the data representation, in HyperRec, users and items are modeled with binary vectors in a high dimension. The binary representation enables to perform the reasoning process of the proposed algorithm only using Boolean operations, which is efficient on various computing platforms and suitable for hardware acceleration. In this work, we show how to utilize GPU and FPGA to accelerate the proposed HyperRec. When compared with the state-of-the-art methods for rating prediction, the CPU-based HyperRec implementation is 13.75 faster and consumes 87% less memory, while decreasing the mean squared error (MSE) for the prediction by as much as 31.84%. Our FPGA implementation is on average 67.0 faster and has 6.9 higher energy efficient as compared to CPU. Our GPU implementation further achieves on average 3.1 speedup as compared to FPGA, while providing only 1.2 lower energy efficiency. © 2021 Association for Computing Machinery. -
dc.language English -
dc.publisher Institute of Electrical and Electronics Engineers Inc. -
dc.relation.ispartof Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC -
dc.title HyperRec: Efficient Recommender Systems with Hyperdimensional Computing -
dc.type Conference Paper -
dc.identifier.doi 10.1145/3394885.3431553 -
dc.identifier.wosid 000668583700071 -
dc.identifier.scopusid 2-s2.0-85100546966 -
dc.identifier.bibliographicCitation 26th Asia and South Pacific Design Automation Conference, ASP-DAC 2021, pp.384 - 389 -
dc.citation.conferenceDate 2021-01-18 -
dc.citation.conferencePlace JA -
dc.citation.conferencePlace Tokyo -
dc.citation.endPage 389 -
dc.citation.startPage 384 -
dc.citation.title 26th Asia and South Pacific Design Automation Conference, ASP-DAC 2021 -

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